參數(shù)資料
型號: 82541ER
廠商: Intel Corp.
英文描述: 82541ER Gigabit Ethernet Controller
中文描述: 82541ER千兆位以太網(wǎng)控制器
文件頁數(shù): 14/48頁
文件大?。?/td> 284K
代理商: 82541ER
82541ER Gigabit Ethernet Controller
8
Datasheet
3.2.1
PCI Address, Data and Control Signals (44)
Symbol
Type
Name and Function
AD[31:0]
TS
Address and Data.
Address and data signals are multiplexed on the same PCI pins. A
bus transaction includes an address phase followed by one or more data phases.
The address phase is the clock cycle when the Frame signal (FRAME#) is asserted
low. During the address phase AD[31:0] contain a physical address (32 bits). For I/O,
this is a byte address, and for configuration and memory, a DWORD address. The
82541ER device uses little endian byte ordering.
During data phases, AD[7:0] contain the least significant byte (LSB) and AD[31:24]
contain the most significant byte (MSB).
C/BE#[3:0]
TS
Bus Command and Byte Enables.
Bus command and byte enable signals are
multiplexed on the same PCI pins. During the address phase of a transaction, C/
BE#[3:0] define the bus command. In the data phase, C/BE#[3:0] are used as byte
enables. The byte enables are valid for the entire data phase and determine which byte
lanes contain meaningful data.
C/BE#[0] applies to byte 0 (LSB) and C/BE#[3] applies to byte 3 (MSB).
PAR
TS
Parity.
The Parity signal is issued to implement even parity across AD[31:0] and C/
BE#[3:0]. PAR is stable and valid one clock after the address phase. During data
phases, PAR is stable and valid one clock after either IRDY# is asserted on a write
transaction or TRDY# is asserted after a read transaction. Once PAR is valid, it remains
valid until one clock after the completion of the current data phase.
When the 82541ER controller is a bus master, it drives PAR for address and write data
phases, and as a slave device, drives PAR for read data phases.
FRAME#
STS
Cycle Frame.
The Frame signal is driven by the
82541ER device to indicate the
beginning and length of a bus transaction.
While FRAME# is asserted, data transfers continue. FRAME# is de-asserted when the
transaction is in the final data phas
e.
IRDY#
STS
Initiator Ready.
Initiator Ready indicates the ability of the 82541ER controller (as a bus
master device) to complete the current data phase of the transaction. IRDY# is used in
conjunction with the Target Ready signal (TRDY#). The data phase is completed on any
clock when both IRDY# and TRDY# are asserted.
During the write cycle, IRDY# indicates that valid data is present on AD[31:0]. For a
read cycle, it indicates the master is ready to accept data. Wait cycles are inserted until
both IRDY# and TRDY# are asserted together. The 82541ER controller drives IRDY#
when acting as a master and samples it when acting as a slave.
TRDY#
STS
Target Ready.
The Target Ready signal indicates the ability of the 82541ER controller
(as a selected device) to complete the current data phase of the transaction. TRDY# is
used in conjunction with the Initiator Ready signal (IRDY#). A data phase is completed
on any clock when both TRDY# and IRDY# are sampled asserted.
During a read cycle, TRDY# indicates that valid data is present on AD[31:0]. For a write
cycle, it indicates the target is ready to accept data. Wait cycles are inserted until both
IRDY# and TRDY# are asserted together. The 82541ER device drives TRDY# when
acting as a slave and samples it when acting as a master.
STOP#
STS
Stop.
The Stop signal indicates the current target is requesting the master to stop the
current transaction. As a slave, the 82541ER controller drives STOP# to request the
bus master to stop the transaction. As a master, the 82541ER controller receives
STOP# from the slave to stop the current transaction.
相關(guān)PDF資料
PDF描述
82546EB Dual Port Gigabit Ethernet Controller
8254 PROGRAMMABLE INTERVAL TIMER
82555 10/100 Mbps LAN physical layer interface
82557 Fast Ethernet PCI Bus Controller(快速以太網(wǎng) PCI總線控制器)
82559 Fast Ethernet Multifunction PCI/CARD bus controller(快速以太網(wǎng)多功能PCI/CARD 總線控制器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
82541ER_13 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:82541ER Gigabit Ethernet Controller
82541PI 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel?? 82541PI Gigabit Ethernet Controller
82542-00000 功能描述:3M REPLACEMENT CLEAR CHIN PR 制造商:3m 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1
82542140 功能描述:壓敏電阻 13600pF, 0.5W 18vdc RoHS:否 制造商:EPCOS 產(chǎn)品:MLV 電壓額定值 DC:22 V 電壓額定值 AC:17 V 鉗位電壓:50 V 直徑: 峰值浪涌電流:30 A 浪涌能量額定值:75 mJ 電容:74.2 pF 工作溫度范圍:- 55 C to + 125 C 安裝:SMD/SMT 封裝:Reel
8-25422-3 制造商:TE Connectivity 功能描述:PIN,DOWEL - Bulk