參數(shù)資料
型號(hào): 7630
英文描述: 7630 Group Datasheet Datasheet 840K/JAN.13.99
中文描述: 7630組數(shù)據(jù)表數(shù)據(jù)表840K/JAN.13.99
文件頁數(shù): 31/49頁
文件大?。?/td> 840K
代理商: 7630
30
MITSUBISHI MICROCOMPUTERS
7630 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
CAN MODULE
The CAN (Controller Area Network) interface of the 7630 group
complies with the 2.0B specification, enabling reception and trans-
mission of frames with either 11- or 29- bit identifier length. Refer to
Fig. 31 for a block diagram of the CAN interface.
The programmer’s interface to the CAN module is formed by three
status/control registers (Fig. 32, Fig. 33, Fig. 34), two bus timing
control registers (Fig. 35 Fig. 36), several registers for acceptance
filtering (Fig. 37), the transmit and receive buffer registers (Fig. 38)
and one dominant level control bit (Fig. 22).
Baud Rate Selection
A programmable clock prescaler is used to derive the CAN mod-
ule’s basic clock from the internal system clock frequency (
φ
). Bit 0
to bit 3 of the CAN bus timing control register represent the pres-
caler allowing a division ratio from 1 to 1/16 to be selected. So the
CAN module basic clock frequency f
CANB
can be calculated as fol-
lows:
where pis the value of the prescaler (selectable from 1 to 15). The
effective baud rate of the CAN bus communication depends on the
CAN bus timing control parameters and will be explained below.
CAN Bus Timing Control
Each bit-time consists of four different segments (see Fig. 30):
Synchronization segment (SS),
Propagation time segment (PTS),
Phase buffer segment 1 (PBS1) and
Phase buffer segment 2 (PBS2).
Fig. 30
Bit time of CAN module
The first of these segments is of fixed length (one Time Quantum)
and the latter three can be programmed to be 1 to 8 Time Quanta
by the CAN bus timing control register 1 and 2 (see Fig. 35 and Fig.
36). The whole bit-time has to consist of minimum 8 and maximum
25 Time Quanta. The duration of one Time Quantum is the cycle
time of f
CANB
. For example, assuming
φ
= 5 MHz, p = 0, one Time
Quantum will be 200 ns long. This allows the maximum transmis-
sion rate of 625 kb/s to be reached (assuming 8 Time Quanta per
bit-time).
Fig. 31
Block diagram of CAN module
f
CANB
+
p
1
-----------
=
SS
PTS
PBS1
PBS2
Sample point
Bit-time
bus timing control
register
data bus
acceptance mask
register
acceptance code
register
transmit buffer
receive buffer 1
receive buffer 2
acceptance filter
data bus
P3
1
/CTX
P3
2
/CRX
protocol controller
CAN wake-up
wake-up logic
polarity control
register
CAN status/control
registers
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