參數(shù)資料
型號: 74LVTH182512DGGRE4
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: LVT SERIES, DUAL 9-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PDSO64
封裝: GREEN, PLASTIC, TSSOP-64
文件頁數(shù): 33/38頁
文件大小: 735K
代理商: 74LVTH182512DGGRE4
SN54LVTH18512, SN54LVTH182512, SN74LVTH18512, SN74LVTH182512
3.3-V ABT SCAN TEST DEVICES
WITH 18-BIT UNIVERSAL BUS TRANSCEIVERS
SCBS671B – AUGUST 1996 – REVISED OCTOBER 1997
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL NAME
DESCRIPTION
1A1–1A9,
2A1–2A9
Normal-function A-bus I/O ports. See function table for normal-mode logic.
1B1–1B9,
2B1–2B9
Normal-function B-bus I/O ports. See function table for normal-mode logic.
1CLKAB, 1CLKBA,
2CLKAB, 2CLKBA
Normal-function clock inputs. See function table for normal-mode logic.
GND
Ground
1LEAB, 1LEBA,
2LEAB, 2LEBA
Normal-function latch enables. See function table for normal-mode logic.
1OEAB, 1OEBA,
2OEAB, 2OEBA
Normal-function output enables. See function table for normal-mode logic. An internal pullup at each terminal forces the
terminal to a high level if left unconnected.
TCK
Test clock. One of four terminals required by IEEE Std 1149.1-1990. Test operations of the device are synchronous to
TCK. Data is captured on the rising edge of TCK and outputs change on the falling edge of TCK.
TDI
Test data input. One of four terminals required by IEEE Std 1149.1-1990. TDI is the serial input for shifting data through
the instruction register or selected data register. An internal pullup forces TDI to a high level if left unconnected.
TDO
Test data output. One of four terminals required by IEEE Std 1149.1-1990. TDO is the serial output for shifting data
through the instruction register or selected data register.
TMS
Test mode select. One of four terminals required by IEEE Std 1149.1-1990. TMS directs the device through its TAP
controller states. An internal pullup forces TMS to a high level if left unconnected.
VCC
Supply voltage
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