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參數(shù)資料
| 型號： | 74F760 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal buffer (open-collector)(八通道緩沖器（集電極開路）) |
| 中文描述： | 八路緩沖器（集電極開路）（八通道緩沖器（集電極開路）） |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 128K |
| 代理商： | 74F760 |
Philips Semiconductors
Application note
AN214
74F extended octal-plus family applications
2
June 1988
Revised: June 1996
74F Extended Octal-Plus Family Features
8-, 9-, and 10-bit “Light-Load” bus products
–
Buffers/Drivers
With and without latches or registers
With and without 8-bit parity checker/generator
–
Transceivers
With and without dual registers
With and without 8-bit parity checker/generator
Patented “Light-Load” inputs:
–
Input Current
=
±
20
μ
A per input
–
Transceiver I/O pins =
±
70
μ
A
High performance output drive currents:
–
I
OL
= 64mA/48mA
@
±
5%/10% V
CC
–
I
OH
= –15mA/–3mA @
±
5%/10% V
CC
“Flow-through” or “broadside” I/O pin configuration
Ideal for MOS CPU, peripherals and semi-custom bus interface
24-pin, 300mil-wide, plastic slim-DIPs
High performance buffers — t
P(max)
= 7.5ns
High performance latches/registers — f
T
= 100MHz
Introduction
The 74F Extended Octal-Plus Family incorporates all of the latest
Philips Semiconductors octal, 9-bit and 10-bit buffer, transceiver,
latch and register functions. all devices in this family utilize the
Philips Semiconductors patented “Light-Load” NPN,
±
20
μ
A input
current structure and have “flow-through” or “broadside” input/output
pin configurations where the inputs and outputs are lined-up on
opposite sides of a standard 24-pin Slim-DIP package. The
“l(fā)ight-load” inputs, “broadside” design and high functional
density/performance of the family make this product line ideal for
buffering the limited drive capabilities of standard, custom and
semicustom MOS VLSI devices to the rigorous environments of
today’s leading edge high performance logic designs. The family
also is an excellent choice for all general interface applications.
“Flow-Through” Design
The “flow-through” or “broadside” chip layout/package design is
illustrated in Figure 1 showing the block diagrams and pin
configurations of the 74F828 10-bit Inverting buffer. Note that all of
these “broadside” designs allow logic signals to flow into one side
and out of the other without crossing or folding back on signal paths
such as the 74F240 Octal Buffers (Figure 2). If you compare the
physical layout requirements of the path of PC board bus lines for
the 74F828 to that of the 74F240’s “zig-zag” path, you will see the
significant advantages of the 74F Extended Octal-Plus Family’s
“flow-through” design in simplifying the design and layout of large,
high density, bus-oriented PC boards.
The 24-pin, 300mil-wide, Slip-DIP Solution
With the advent of advanced Schottky TTL technology came the
ability to significantly increase the functional density of standard
logic building blocks. However, not until the development of the
24-pin, 300mil-wide, Slim-DIP package was it possible to take full
advantage of these new chip densities. The entire family provides
significant advantages in package count, pin count and packing
density when compared to older technologies. Further density
enhancements can be achieved by using Philips surface mounted
packages.
By combining high functional density into a 24-pin 300mil-wide
Slim-DIP package, the Philips Semiconductors 74F Extended
Octal-Plus Family allows the reduction of PC board parts count and
cost while optimizing layout with “broadside” chip designs, reducing
total system power dissipation and increasing system reliability.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
OE0
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
V
CC
O0
O1
O2
O3
O4
O5
O7
O6
O8
O9
OE1
GND
SF01329
Figure 1. 74F828 Broadside Pin Configuration
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
OEa
Ia0
Yb0
Ia1
Yb1
Ia2
Yb2
Ia3
Yb3
GND
V
CC
OEb
Ya0
Ib0
Ya1
Ib1
Ya2
Ya3
Ib2
Ib3
SF01330
Figure 2. 74F240 ’Zig-Zag” Pin Configuration
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