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參數(shù)資料
| 型號： | 72SD3232RPFE |
| 廠商： | MAXWELL TECHNOLOGIES |
| 元件分類： | DRAM |
| 英文描述： | 1 Gbit SDRAM 32-Meg X 32-Bit X 4-Banks |
| 中文描述： | 32M X 32 SYNCHRONOUS DRAM, 6 ns, DFP72 |
| 封裝： | STACK, DFP-72 |
| 文件頁數(shù)： | 20/41頁 |
| 文件大?。?/td> | 596K |
| 代理商： | 72SD3232RPFE |
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72SD3232
M
20
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
1 Gbit(32-Meg X 32-Bit X 4-Banks) SDRAM
02.04.05 Rev 3
Operation of the SDRAM
The following section shows operation examples of 72SD3232.
Note: The SDRAMshould be used according to the product capability ( See Pin Description and AC
Characteristics.)
Read/Write Operations:
Bank Active:
Before executing a read or write operation, the corresponding bank and the row address must
be activated by the bank active (ACTV) command. An interval of t
RCD
is required between the bank active
command input and the following read/write command input.
Read operation:
A read operation starts when a read command is input. The output buffer becomes Low-Z
in the (CAS latency - 1) cycle after read command set. The SDRAMcan performa burst read operation.
The burst length can be set to 1, 2, 4, or 8. The start address for a burst read is specified by the column
address and the bank select address (BA0/BA1) at the read command set cycle. In a read operation, data
output starts after the number of clocks specified by the CAS latency. The CAS latency can be set to 2 or 3.
When the burst length is 1, 2, 4, or 8, the D
buffer automatically becomes High-Z at the next clock after
the successive burst-length data has been output.
The CAS latency and burst length must be specified at the mode register.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 72SD3232RPFH | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:1 Gbit SDRAM 32-Meg X 32-Bit X 4-Banks |
| 72SD3232RPFI | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:1 Gbit SDRAM 32-Meg X 32-Bit X 4-Banks |
| 72SD3232RPFK | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:1 Gbit SDRAM 32-Meg X 32-Bit X 4-Banks |
| 7-2SDLSJ40 | 制造商:Cooper Bussmann 功能描述:CAPACITOR FUSEM, 7.2KV,40 - Bulk |
| 72T18105L10BB | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Async/Sync Dual Depth/Width Uni-Dir 128K x 18/256K x 9 240-Pin BGA 制造商:Integrated Device Technology Inc 功能描述:FIFO ASYNC/SYNC DUAL DEPTH/WIDTH UNI-DIR 128KX18/256KX9 240B - Trays |
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