參數資料
型號: 72SD3232RPFE
廠商: MAXWELL TECHNOLOGIES
元件分類: DRAM
英文描述: 1 Gbit SDRAM 32-Meg X 32-Bit X 4-Banks
中文描述: 32M X 32 SYNCHRONOUS DRAM, 6 ns, DFP72
封裝: STACK, DFP-72
文件頁數: 18/41頁
文件大?。?/td> 596K
代理商: 72SD3232RPFE
72SD3232
M
18
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
1 Gbit(32-Meg X 32-Bit X 4-Banks) SDRAM
02.04.05 Rev 3
Mode Register Configuration
The mode register is set by the input to the address pins (A0 to A12, BA0 and BA1) during mode register set
cycles. The mode register consists of five sections, each of which is assigned to address pins.
BA0, BA1, A11, A10, A12, A9, A8: (OPCODE):
The SDRAMhas two types of write modes. One is the
burst
write mode
, and the other is the
single write mode
. These bits specify write mode.
Burst read and burst write:
Burst write is performed for the specified burst length starting fromthe column
address specified in the write cycle.
Burst read and single write:
Data is only written to the column address specified during the write cycle,
regardless of the burst length.
A7:
Keep this bit Low at the mode register set cycle. If this pin is high, the vender test mode is set.
A6, A5, A4: (LMODE):
These pins specify the CAS latency.
A3: (BT):
A burst type is specified.
A2, A1, A0: (BL):
These pins specify the burst length.
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