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參數(shù)資料
| 型號(hào)： | 7130LA35TF8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | SRAM |
| 英文描述： | 1K X 8 DUAL-PORT SRAM, 35 ns, PQFP64 |
| 封裝： | STQFP-64 |
| 文件頁(yè)數(shù)： | 18/19頁(yè) |
| 文件大?。?/td> | 153K |
| 代理商： | 7130LA35TF8 |
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IDT7130SA/LA and IDT7140SA/LA
High-Speed 1K x 8 Dual-Port Static SRAM
Military, Industrial and Commercial Temperature Ranges
8
AC Electrical Characteristics Over the
Operating Temperature Supply Voltage Range(3)
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage Output Test Load (Figure 2).
2. PLCC, TQFP and STQFP packages only.
3. 'X' in part numbers indicates power rating (SA or LA).
4. This parameter is guaranteed by device characterization, but is not production tested.
.
7130X20(2)
7140X20
(2)
Com'l Only
7130X25
7140X25
Com'l, Ind
& Military
7130X35
7140X35
Com'l
& Military
Unit
Symbol
Parameter
Min.Max.Min.
Max.Min.Max.
READ CYCLE
tRC
Read Cycle Time
20
____
25
____
35
____
ns
tAA
Address Access Time
____
20
____
25
____
35
ns
tACE
Chip Enable Access Time
____
20
____
25
____
35
ns
tAOE
Output Enable Access Time
____
11
____
12
____
20
ns
tOH
Output Hold from Address Change
3
____
3
____
3
____
ns
tLZ
Output Low-Z Time
(1,4)
0
____
0
____
0
____
ns
tHZ
Output High-Z Time
(1,4)
____
10
____
10
____
15
ns
tPU
Chip Enable to Power Up Time
(4)
0
____
0
____
0
____
ns
tPD
Chip Disable to Power Down Time(4)
____
20
____
25
____
35
ns
2689 tbl 09a
7130X55
7140X55
Com'l, Ind
& Military
7130X100
7140X100
Com'l, Ind
& Military
Unit
Symbol
Parameter
Min.
Max.
Min.
Max.
READ CYCLE
tRC
Read Cycle Time
55
____
100
____
ns
tAA
Address Access Time
____
55
____
100
ns
tACE
Chip Enable Access Time
____
55
____
100
ns
tAOE
Output Enable Access Time
____
25
____
40
ns
tOH
Output Hold from Address Change
3
____
10
____
ns
tLZ
Output Low-Z Time(1,4)
5
____
5
____
ns
tHZ
Output High-Z Time(1,4)
____
25
____
40
ns
tPU
Chip Enable to Power Up Time
(4)
0
____
0
____
ns
tPD
Chip Disable to Power Down Time(4)
____
50
____
50
ns
2689 tbl 09b
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 7140LA35CB | 1K X 8 DUAL-PORT SRAM, 35 ns, CDIP48 |
| 7134SA35PB | 4K X 8 DUAL-PORT SRAM, 35 ns, PDIP48 |
| 71522-1050 | 50 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG |
| 71522-2050 | 50 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG |
| 71522-3050 | 50 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 7130LA35TFG | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 8KBIT 35NS 64TQFP |
| 7130LA45TFI | 功能描述:IC SRAM 8KBIT 64TQFP 制造商:idt, integrated device technology inc 系列:* 零件狀態(tài):最後搶購(gòu) 標(biāo)準(zhǔn)包裝:160 |
| 7130LA45TFI8 | 功能描述:IC SRAM 8KBIT 64TQFP 制造商:idt, integrated device technology inc 系列:* 零件狀態(tài):最後搶購(gòu) 標(biāo)準(zhǔn)包裝:500 |
| 7130LA55C | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7130LA55CB | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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