Development Support
Background Debug Mode
68HC(9)12DG128 Rev 1.0
MOTOROLA
Development Support
341
13-dev
ENTAG — Tagging Enable
Set by the TAGGO command and cleared when BDM mode is
entered. The serial system is disabled and the tag function enabled
16 cycles after this bit is written.
0 = Tagging not enabled, or BDM active.
1 = Tagging active. BDM cannot process serial commands while
tagging is active.
SDV — Shifter Data Valid
Shows that valid data is in the serial interface shift register. Used by
the BDM firmware.
0 = No valid data. Shift operation is not complete.
1 = Valid Data. Shift operation is complete.
TRACE — Asserted by the TRACE1 command
CLKSW — Clock Switch
0 = BDM system operates with BCLK.
1 = BDM system operates with ECLK.
The WRITE_BD_BYTE@FF01 command that changes CLKSW
including 150 cycles after the data portion of the command should be
timed at the old speed. Beginning with the start of the next BDM
command, the new clock can be used for timing BDM communications.
If ECLK rate is slower than BCLK rate, CLKSW is ignored and BDM
system is forced to operate with ECLK.
INSTRUC TION -
Hardware
Instruction
Decode
The INSTRUCTION register is written by the BDM hardware as a result
of serial data shifted in on the BKGD pin. It is readable and writable in
Special Peripheral mode on the parallel bus. It is discussed here for two
conditions: when a
hardware
command is executed and when a
firmware
command is executed.
Read and write: all modes
The hardware clears the INSTRUCTION register if 512 BCLK cycles
occur between falling edges from the host.