MOTOROLA
E-4
MC68HC05B6
Rev. 4
MC68HC705B16
14
(1) This bit is set each time there is a power-on reset.
(2) The state of the WDOG bit after reset is dependent upon the mask option selected; 1=watchdog enabled, 0=watchdog disabled.
(3) This register is implemented in EEPROM; therefore reset has no effect on the individual bits.
(4) This register is implemented in EPROM; therefore reset has no effect on the individual bits.
Table E-1
Register outline
Register name
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State on
reset
Undefined
Undefined
Undefined
Port A data (PORTA)
Port B data (PORTB)
Port C data (PORTC)
$0000
$0001
$0002
PC2/
ECLK
PD2
Port D data (PORTD)
Port A data direction (DDRA)
Port B data direction (DDRB)
Port C data direction (DDRC)
EPROM/EEPROM/ECLK control
A/D data (ADDATA)
A/D status/control (ADSTAT)
Pulse length modulation A (PLMA)
Pulse length modulation B (PLMB)
Mscellaneous
SCI baud rate (BAUD)
SCI control 1 (SCCR1)
SCI control 2 (SCCR2)
SCI status (SCSR)
SCI data (SCDR)
Timer control (TCR)
Timer status (TSR)
Input capture high 1
Input capture low 1
Output compare high 1
Output compare low 1
Timer counter high
Timer counter low
Alternate counter high
Alternate counter low
Input capture high 2
Input capture low 2
Output compare high 2
Output compare low 2
Options (OPTR)
(3)
Mask option register (MOR)
(4)
$0003
$0004
$0005
$0006
$0007
$0008
$0009 COCO ADRC ADON
$000A
$000B
$000C POR
(1)
$000D
SPC1 SPC0 SCT1 SCT0 SCT0 SCR2 SCR1 SCR0 00uu uuuu
$000E
R8
T8
M
$000F
TIE
TCIE
RIE
ILIE
$0010
TDRE
TC
RDRF
IDLE
$0011
$0012
ICIE
OCIE
TOIE FOLV2 FOLV1 OLV2 IEDG1 OLVL1 0000 00u0
$0013
ICF1
OCF1
TOF
ICF2
$0014
$0015
$0016
$0017
$0018
$0019
$001A
$001B
$001C
$001D
$001E
$001F
$0100
$3DFE
RTIM RWAT WWAT PBPD PCPD Not affected
PD7
PD6
PD5
PD4
PD3
PD1
PD0
Undefined
0000 0000
0000 0000
0000 0000
E6LAT E6PGM ECLK E1ERA E1LAT E1PGM0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
(2)
001 000
0
CH3
CH2
CH1
CH0
INTP
INTN
INTE
SFA
SFB
SM WDOG
WAKE CPOL CPHA LBCL Undefined
TE
RE
RWU
OR
NF
FE
SBK
0000 0000
1100 000u
0000 0000
OCF2
Undefined
Undefined
Undefined
Undefined
Undefined
1111 1111
1111 1100
1111 1111
1111 1100
Undefined
Undefined
Undefined
Undefined
EE1P
SEC Not affected
TPG