參數(shù)資料
型號: 2SJ492
廠商: NEC Corp.
英文描述: SWITCHING P-CHANNEL POWER MOS FET INDUSTRIAL USE
中文描述: 開關(guān)P溝道功率MOS FET工業(yè)用
文件頁數(shù): 2/8頁
文件大小: 72K
代理商: 2SJ492
Data Sheet D11264EJ1V0DS00
2
2SJ492
ELECTRICAL CHARACTERISTICS (T
A
= 25 °C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Drain to Source On-state Resistance
R
DS(on)1
V
GS
= –10
V, I
D
= –10
A
70
100
m
R
DS(on)2
V
GS
= –4
V, I
D
= –10
A
120
185
m
Gate to Source Cut-off Voltage
V
GS(off)
V
DS
= –10
V, I
D
= –1
mA
–1.0
–1.5
–2.0
V
Forward Transfer Admittance
| y
fs
|
V
DS
= –10 V, I
D
= –10 A
5.0
12
S
Drain Leakage Current
I
DSS
V
DS
= –60
V, V
GS
= 0
V
–10
μ
A
Gate to Source Leakage Current
I
GSS
V
GS
=
#
20
V, V
DS
= 0
V
#
10
μ
A
Input Capacitance
C
iss
V
DS
= –10
V
1210
pF
Output Capacitance
C
oss
V
GS
= 0
V
520
pF
Reverse Transfer Capacitance
C
rss
f = 1
MHz
180
pF
Turn-on Delay Time
t
d(on)
I
D
= –10
A
16
ns
Rise Time
t
r
V
GS(on)
= –10
V
140
ns
Turn-off Delay Time
t
d(off)
V
DD
= –30
V
90
ns
Fall Time
t
f
R
G
= 10
80
ns
Total Gate Charge
Q
G
I
D
= –20
A
42
nC
Gate to Source Charge
Q
GS
V
DD
= –48
V
8.0
nC
Gate to Drain Charge
Q
GD
V
GS
= –10
V
10
nC
Body Diode Forward Voltage
V
F(S-D)
I
F
= –20
A, V
GS
= 0
V
1.0
V
Reverse Recovery Time
t
rr
I
F
= –20
A, V
GS
= 0
V
125
ns
Reverse Recovery Charge
Q
rr
di/dt = 50
A
/
μ
s
280
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
R
G
= 25
50
PG
L
V
DD
V
GS
= –20
0 V
BV
DSS
I
AS
I
D
V
DS
Starting T
ch
V
DD
D.U.T.
TEST CIRCUIT 3 GATE CHARGE
PG.
50
D.U.T.
R
L
V
DD
I
G
= 2 mA
90 %
V
GS(on)
90 %
t
d(off)
t
f
10 %
I
D
t
off
TEST CIRCUIT 2 SWITCHING TIME
PG.
R
0
V
GS
D.U.T.
R
L
V
DD
τ
= 1 s
Duty Cycle
1 %
GS
Wave Form
I
D
Wave Form
V
GS
10 %
10 %
0
I
D
90 %
t
d(on)
t
r
τ
R
G
= 10
0
t
on
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