E
28F160S3/28F320S3
21
PRELIMINARY
4.2.5
SYSTEM INTERFACE INFORMATION
The following device information can be useful in
optimizing system interface software.
Table 9. System Interface Information
Offset
Length
(bytes)
Description
28F160S3
28F320S3
1Bh
01h
V
CC
Logic Supply Minimum Program/Erase Voltage
bits 7
–4 BCD volts
bits 3–0 BCD 100 mv
1B: 0027h
1B: 0027h
1Ch
01h
V
CC
Logic Supply Maximum Program/Erase Voltage
bits 7–4 BCD volts
bits 3–0 BCD 100 mv
1C: 0055h
1C: 0055h
1Dh
01h
V
PP
[Programming] Supply Minimum Program/Erase
Voltage
bits 7–4 HEX volts
bits 3–0 BCD 100 mv
1D: 0027h
1D: 0027h
1Eh
01h
V
PP
[Programming] Supply Maximum Program/Erase
Voltage
bits 7–4 HEX volts
bits 3–0 BCD 100 mv
1E: 0055h
1E: 0055h
1Fh
01h
Typical Time-Out per Single Byte/Word Program,
2
N
μsec
1F: 0003h
(2
3
= 8)
1F: 0003h
(2
3
= 8)
20h
01h
Typical Time-Out for Max. Buffer Write, 2
N
μsec
20: 0006h
(2
6
= 64)
20:
0006h
(2
6
= 64)
21h
01h
Typical Time-Out per Individual Block Erase,
2
N
msec
21: 000Ah
(0Ah = 10d,
2
10
= 1024)
21:
(0Ah = 10d,
2
10
= 1024)
000Ah
22h
01h
Typical Time-Out for Full Chip Erase, 2
N
msec
22: 000Fh
(0Fh = 15d,
2
15
= 32768)
22:
(0Fh = 15d,
2
15
= 32768)
000Fh
23h
01h
Maximum Time-Out for Byte/Word Program,
2
N
Times Typical
23: 0004h
(2
4
= 16,
16xTypical)
23:
0004h
(2
4
= 16,
16xTypical)
24h
01h
Maximum Time-Out for Buffer Write, 2
N
Times
Typical (2
4
= 16, 16 x Typical)
24: 0004h
(2
4
= 16,
16xTypical)
24:
0004h
(2
4
= 16,
16xTypical)
25h
01h
Maximum Time-Out per Individual Block Erase,
2
N
Times Typical (2
4
= 16, 16 x Typical)
25: 0004h
(2
4
= 16,
16xTypical)
25:
0004h
(2
4
= 16,
16xTypical)
26h
01h
Maximum Time-Out for Full Chip Erase, 2
N
Times
Typical (2
4
= 16, 16 x Typical)
26: 0004h
(2
4
= 16,
16xTypical)
26:
0004h
(2
4
= 16,
16xTypical)