參數(shù)資料
型號(hào)： 23913A
英文描述： Embedded AMD-K6 Processors BIOS Design Guide Application Note? 1.33MB (PDF)
中文描述： 嵌入式的AMD - K6處理器的BIOS設(shè)計(jì)指南應(yīng)用筆記？ 1.33MB（PDF格式）
文件頁數(shù)： 67/98頁
文件大?。?/td> 1365K
代理商： 23913A
Model D Registers
55
23913A/0—November 2000
Embedded AMD-K6 Processors BIOS Design Guide
Preliminary Information
EPM 16-Byte I/O Block (Low-Power Versions Only)
The EPM 16-byte I/O block contains one 4-byte field—Bus
Divisor and Voltage ID Control (BVC)—for enabling,
controlling, and monitoring the EPM features (see Figure 27).
All accesses to the EPM 16-byte I/O block must be aligned
dword accesses. Except for the EPM special bus cycle, valid
accesses to the EPM 16-byte block do not generate I/O bus
cycles, while non-aligned and non-dword accesses are passed to
the I/O bus.
Figure 27. EPM 16-Byte I/O Block (Low-Power Model D)
Table 26 defines the function of the byte-field within the EPM
16-byte I/O block mapped by the EPMR.
BVC Field
Figure 28 on page 56 shows the format and Table 27 defines the
function of each bit of the BVC field located within the 16-byte
I/O block.
Note:
The EPM Stop Grant state is a low-power, clock-control state
entered by writing a non-zero value to the SGTC field for
altering the core voltage and frequency settings. System-
initiated inquire (snoop) cycles are not supported and must
be prevented during EPM Stop Grant clock control state.
Reserved
0
12
15
11
8
7
BVC
Symbol Description
BVC
Bus Divisor and Voltage ID Control
Bytes
11-8
Table 26. EPM 16-Byte I/O Block Definition (Low-Power Model D)
Byte
Description
Reserved
R/W
Function
1
All reserved bits are always read as 0.
The bit fields within the BVC bytes allow software to
change the processor bus divisor and core voltage.
All reserved bits are always read as 0.
Notes:
1.
All bits default to 0 when RESET is asserted.
15-12
R
11-8
Bus Divisor and Voltage ID Control (BVC)
R/W
7-0
Reserved
R
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