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參數(shù)資料
| 型號： | 20668 |
| 英文描述： | ?lanSC300 Data Sheet ?lanSC310 Data Sheet |
| 中文描述： | ？lanSC300數(shù)據(jù)表？lanSC310數(shù)據(jù)表 |
| 文件頁數(shù)： | 9/119頁 |
| 文件大?。?/td> | 1167K |
| 代理商： | 20668 |
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P R E L I M I N A R Y
élanSC310 Microcontroller Data Sheet
9
LIST OF TABLES
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10. Power Pins............................................................................................................... 29
Table 11.
Non-Multiplexed Address Signals Provided by MA11–MA0 .................................... 30
Table 12. DRAM Mode Selection............................................................................................. 39
Table 13. MA and SA Signal Pin Sharing ................................................................................ 39
Table 14. Supported DRAM/SRAM Configuration................................................................... 39
Table 15. DRAM Address Translation (Page Mode)................................................................ 40
Table 16. DRAM Address Translation (Enhanced Page Mode)............................................... 40
Table 17. SRAM Access Pins.................................................................................................. 41
Table 18. SRAM Wait State Select Logic................................................................................. 41
Table 19. High-Speed CPU Clock Frequencies....................................................................... 44
Table 20. PLL Output............................................................................................................... 44
Table 21. PMU Modes ............................................................................................................. 45
Table 22. Internal Clock States................................................................................................ 45
Table 23. Internal I/O Pulldown States..................................................................................... 50
Table 24. Parallel Port EPP Mode Pin Definition..................................................................... 52
Table 25. External Resistor Requirements .............................................................................. 56
Table 26. Bus Option Select Bit Logic...................................................................................... 59
Table 27. Pins Shared Between Maximum ISA Bus and Local Bus Interface Functions......... 60
Table 28. SRAM Interface........................................................................................................ 61
Table 29. Bidirectional Parallel Port Pin Description................................................................ 61
Table 30. X1OUT Clock Source Pin Description...................................................................... 61
Table 31. XT Keyboard Pin Description................................................................................... 62
Table 32. 14-MHz Clock Source.............................................................................................. 62
Table 33. ISA Bus Functionality............................................................................................... 63
Table 34. ISA Bus Functionality Lost when Configured for Local Bus Mode........................... 63
Table 35. Boundary Scan (JTAG) Cells—Order and Type...................................................... 65
Table 36. élanSC310 Microcontroller JTAG Instruction Opcodes........................................... 69
Table 37. DC Characteristics over Commercial and Industrial Operating Ranges
(Plastic Shrink Quad Flat Pack (QFP), 33 MHz, 3.3 V)............................................ 70
Table 38. DC Characteristics over Commercial and Industrial Operating Ranges
(Plastic Shrink Quad Flat Pack (QFP), 33 MHz, 5 V)............................................... 71
Table 39. Commercial and Industrial Operating Voltage ranges at 25°C ................................ 71
Table 40. Thermal Resistance (°C/Watt)
ψ
JT
and
θ
JA
for 208-pin QFP and TQFP packages. 72
Table 41. Typical Maximum ISA Mode Power Consumption................................................... 72
Table 42. I/O Drive Type Description (Worst Case)................................................................. 73
Table 43. Recommended Oscillator Component Value Limits................................................. 85
Table 44. Loop-Filter Component Values ................................................................................ 86
Table 45. Power-Up Sequencing............................................................................................. 88
Table 46. DRAM Memory Interface, Page Hit and Refresh Cycle........................................... 92
Table 47. DRAM First Cycle Read Access .............................................................................. 94
Table 48. DRAM Bank/Page Miss Read Cycles...................................................................... 94
Table 49. DRAM First Cycle Write Access............................................................................... 96
Table 50. DRAM Bank/Page Miss Write Cycles ...................................................................... 96
I/O Pin Voltage Level ............................................................................................... 21
Memory Bus Interface.............................................................................................. 22
System Interface...................................................................................................... 23
Keyboard Interface................................................................................................... 24
Parallel Port Interface............................................................................................... 25
Serial Port Interface ................................................................................................. 25
Power Management Interface.................................................................................. 26
Local Bus Interface .................................................................................................. 26
Miscellaneous Interface ........................................................................................... 28
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|---|---|
| 20-668-0003 | 功能描述:微處理器 - MPU Rabbit 2000 Chipset 30MHz RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| 20-668-0011 | 功能描述:微處理器 - MPU Rabbit 3000A LQFP Microprocessor RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| 20-668-0016 | 功能描述:微處理器 - MPU Rabbit 3000 TFBGA Microprocessor RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| 2066-8001-90 | 制造商:TE CONNECTIVITY 功能描述:RF COAXIAL PANEL MOUNT CONNECTOR |
| 20-668-0022 | 功能描述:微處理器 - MPU Rabbit 4000 LQFP Microprocessor RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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