參數(shù)資料
型號(hào)： 160V
廠商： Lattice Semiconductor Corporation
英文描述： In-System Programmable 3.3V Generic Digital CrosspointTM
中文描述： 在系統(tǒng)可編程3.3V的通用數(shù)字CrosspointTM
文件頁數(shù)： 12/37頁
文件大小： 464K
代理商： 160V
12
Specifications
ispGDX160VA
9.0
9.0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
9.0
13.5
11.5
15.7
10.5
10.5
10.5
10.5
–
–
22.0
–
9.0
1.0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Data Prop. Delay from Any I/O pin to Any I/O Pin (4:1 MUX)
Data Prop. Delay from MUXsel Inputs to Any Output (4:1 MUX)
Clock Frequency, Max. Toggle
Clock Frequency with External Feedback
Input Latch or Register Setup Time Before Y
x
Input Latch or Register Setup Time Before I/O Clock
Output Latch or Register Setup Time Before Y
x
Output Latch or Register Setup Time Before I/O Clock
Global Clock Enable Setup Time Before Y
x
Global Clock Enable Setup Time Before I/O Clock
I/O Clock Enable Setup Time Before Y
x
Input Latch or Reg. Hold Time (Y
x
)
Input Latch or Reg. Hold Time (I/O Clock)
Output Latch or Reg. Hold Time (Y
x
)
Output Latch or Reg. Hold Time (I/O Clock)
Global Clock Enable Hold Time (Y
x
)
Global Clock Enable Hold Time (I/O Clock)
I/O Clock Enable Hold Time (Y
x
)
Output Latch or Reg. Clock (from Y
x
) to Output Delay
Input Latch or Register Clock (from Y
x
) to Output Delay
Output Latch or Register Clock (from I/O pin) to Output Delay
Input Latch or Register Clock (from I/O pin) to Output Delay
Input to Output Enable
Input to Output Disable
Test OE Output Enable
Test OE Output Disable
Clock Pulse Duration, High
Clock Pulse Duration, Low
Register Reset Delay from RESET Low
Reset Pulse Width
Output Delay Adder for Output Timings Using Slow Slew Rate
Output Skew (tgco1 Across Chip)
1. All timings measured with one output switching, fast output slew rate setting, except
t
sl
.
2. The delay parameters are measured with Vcc as I/O voltage reference. An additional 0.5ns delay is incurred when Vccio is
used as I/O voltage reference.
External Timing Parameters
Over Recommended Operating Conditions
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
–
–
83
62.5
7.0
6.0
7.0
6.0
4.0
3.0
8.5
0.0
3.0
0.0
3.0
0.0
3.0
0.0
–
–
–
–
–
–
–
–
6.0
6.0
–
18.0
–
–
A
A
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
A
A
A
A
B
C
B
C
–
–
–
–
D
A
t
pd
2
t
sel
2
f
max (Tog.)
f
max (Ext.)
t
su1
t
su2
t
su3
t
su4
t
suce1
t
suce2
t
suce3
t
h1
t
h2
t
h3
t
h4
t
hce1
t
hce2
t
hce3
t
gco1
2
t
gco2
2
t
co1
2
t
co2
2
t
en
2
t
dis
2
t
toeen
2
t
toedis
2
t
wh
t
wl
t
rst
t
rw
t
sl
t
sk
DESCRIPTION
PARAMETER
( )
1
UNITS
-9
MIN. MAX.
#
-7
MIN. MAX.
TEST
1
COND.
–
–
100
80
5.5
4.5
5.5
4.5
3.5
2.5
6.5
0.0
2.5
0.0
2.5
0.0
2.5
0.0
–
–
–
–
–
–
–
–
5.0
5.0
–
14.0
–
–
7.0
7.0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
7.0
11.0
9.0
13.0
8.5
8.5
8.5
8.5
–
–
18.0
–
7.0
0.5
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