參數(shù)資料
型號： ZR36506
英文描述： Fast Recovery Rectifier Diodes
中文描述： 外圍芯片
文件頁數(shù)： 4/99頁
文件大小： 452K
代理商： ZR36506
Zoran ZR36506 USBV ision – Datasheet
Zoran Proprietary and Confidential
ii
Table of Contents
5
Internal Microcontroller Host Request Interface................... 5-1
6
V 8
μ
-RISC Block .......................................................................6-1
General................................................................................................................6-1
Memory Resources .............................................................................................6-1
7
Pow er Management.................................................................7-1
8
Video I nput I nterface.............................................................. 8-1
Video Interface Timing Parameters....................................................................8-3
Input Video Parameters.......................................................................................8-3
Frame-Rate Control.............................................................................................8-6
Video Scaling......................................................................................................8-7
Video Filters........................................................................................................8-8
Video Output Format..........................................................................................8-9
Compressed Data Format....................................................................................8-9
YUV 4:2:2 Interleaved Format......................................................................... 8-10
YUV 4:2:0 Planar Format................................................................................. 8-10
Video Buffer Control registers.......................................................................... 8-11
Special Video Control bits................................................................................ 8-12
USB Pipe Video Data Format........................................................................... 8-12
Data Packets............................................................................................ 8-12
Video Frame Synchronization................................................................ 8-13
Video Frame Header ............................................................................... 8-13
9
SDRAM Control and I nterface ................................................. 9-1
MAU (Memory Access unit)..............................................................................9-1
SDRAM and Memory Buffer Setup Registers ...................................................9-3
Video Setup and Control Registers.....................................................................9-4
CLK48 Output.....................................................................................................9-5
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