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參數(shù)資料
| 型號： | ZR36067 |
| 廠商： | Zoran Corporation |
| 英文描述： | PCI Adapter Intended for Multimedia Applications on PCI Systems(PCI（外圍部件互連）適配器（用于PCI系統(tǒng)的多媒體）) |
| 中文描述： | PCI適配器預(yù)定在PCI系統(tǒng)的多媒體應(yīng)用（個PCI（外圍部件互連）適配器（用于的PCI系統(tǒng)的多媒體）） |
| 文件頁數(shù)： | 28/48頁 |
| 文件大?。?/td> | 580K |
| 代理商： | ZR36067 |
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28
AV PCI CONTROLLER
13.8 Masking Map “Top” Register
This register contains the DWORD base address of the top
masking map.
13.9 Masking Map “Bottom” Register
This register contains the DWORD base address of the bottom
masking map.
13.10 Overlay Control Register
This register contains the parameters controlling overlay (byte 1)
and masking map addressing (byte 0).
23:22
R
Reserved. Returns zero.
21:12
RW
vid
VidWinHt
- Video Window Height.
This register defines the number of lines that
should be displayed by the ZR36067.
If DispMod = 0, VidWinHt is half the number,
if DispMod = 1, it is the entire number of
display lines.
Default value is 0x0F0.
11:10
R
Reserved. Returns zero.
9:0
RW
vid
VidWinWid
- Video Window Width.
This register defines the width of the video
window in number of pixels.
Default value is 0x3FF.
Address Offset: 0x01C
Bit
Type
Mod
Description
31:2
1:0
RW
R
vid
MaskTopBase
- Masking Map Top Base
Address.
This is the source starting address of the top
field for the masking map read transfers.
Default value is 0xFFFFFFFC.
Bits 1..0 are hardwired to 00b.
Address Offset: 0x020
Bit
Type
Mod
Description
31:2
1:0
RW
R
vid
MaskBotBase
- Masking Map Bottom Base
Address.
This is the source starting address of the
bottom field for the masking map read trans-
fers.
Default value is 0xFFFFFFFC.
Bits 1..0 are hardwired to 00b.
Address Offset: 0x018 (Continued)
Bit
Type
Mod
Description
Address Offset: 0x024
Bit
Type
Mod
Description
31:16
R
Reserved. Returns zero.
15
RW
vid
OvlEnable
- Overlay Enable flag.
When enabled the masking information in the
video mask is evaluated to allow overlay of
other windows or graphics.
When disabled the video window is always on
top.
‘1’ - overlay enabled,
‘0’ - overlay disabled (default value).
14:8
R
Reserved. Returns zero.
7:0
RW
vid
MaskStride
. This register defines the
address increment in doublewords that is
needed to get from the end of a mask line to
the beginning of the next.
If the address difference between two con-
secutive mask lines in main memory is zero
(i.e, they are physically consecutive) then
MaskStride should be set (by the driver soft-
ware) to zero (if DispMode=1) or the mask
line size in doublewords (if DispMode=0).
Default value is 0xFF.
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