參數(shù)資料
型號: ZPSD301V
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,19個可編程I/O,通用PLD有12個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設備(可編程邏輯,零功耗,16K的位的SRAM,19余個可編程輸入/輸出,通用PLD的有12個輸入)
文件頁數(shù): 45/90頁
文件大小: 491K
代理商: ZPSD301V
ZPSD3XX Famly
3-45
Figure 25.
Timng of 8-Bit
Multiplexed
Address/Data
Bus, CRRWR = 1
(ZPSD3X1)
18
33
34
36
19
DATA VALID
CSI/A19
as CSI
DATA
IN
8
12
5
1
32
7
15
32
32
14
14
6
6
10
9
ADDRESS A
2
ADDRESS B
3
4
33
13
2
16
17
12
13
20
23
23
ADDRESS A
ADDRESS B
INPUT
INPUT
OUTPUT
OUTPUT
READ CYCLE
WRITE CYCLE
STABLE INPUT
STABLE INPUT
Direct
(43)
PAD Input
Multiplexed
(44)
Inputs
A0/AD0-
A7/AD7
Active Low
AS
Active High
AS
RD/E as E
WR/V
PP
or
R/W as R/W
Any of
PA0-PA7
as I/O Pin
Any of
PA0-PA7 Pins
as Address
Outputs
Any of
PB0-PB7
as I/O Pin
1
3
34
35
35
See referenced notes on page 3-63.
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