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參數(shù)資料
| 型號(hào)： | ZL50233/GDG |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DATACOM, ISDN ECHO CANCELLER, PBGA208 |
| 封裝： | 17 X 17 MM, 1.30 MM HEIGHT, MO-192, LBGA-208 |
| 文件頁(yè)數(shù)： | 18/38頁(yè) |
| 文件大?。?/td> | 547K |
| 代理商： | ZL50233/GDG |
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ZL50233
Data Sheet
25
Zarlink Semiconductor Inc.
Power-up
16hex
ECA: Noise Scaling (NS)
R/W Address:
0Ahex + Base Address
ECB: Noise Scaling (NS)
R/W Address:
2Ahex + Base Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
NS7
NS6
NS5
NS4
NS3
NS2
NS1
NS0
Functional Description of Register Bits
This register is used to scale the comfort noise up or down. Larger values will increase the relative level of
comfort noise. The default value of 16hex will provide G.168 compliance with the Advanced NLP. A value of 74hex
is recommended if the original NLP is used.
Power-up
45hex
ECA: Noise Control
R/W Address:
0Bhex + Base Address
ECB: Noise Control
R/W Address:
2Bhex + Base Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserve
NLInc3
NLInc2
NLInc1
NLInc0
Functional Description of Register Bits
Reserve
Reserved bits. Must be set to 4hex for normal operation.
NLInc
Noise level estimator ramping rate. When InjCtrl = 1, a lower value will give faster ramping.
When InjCtrl = 0, a higher value will give faster ramping. The default value of 5hex will provide
G.168 compliance with InjCtrl = 1. A value of Chex is recommended if InjCtrl = 0.
Power-up
N/A
ECA: Rin Peak Detect Register 2 (RP)
Read Address:
0Dhex + Base Address
ECB: Rin Peak Detect Register 2 (RP)
Read Address:
2Dhex + Base Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RP15
RP14
RP13
RP12
RP11
RP10
RP9
RP8
Power-up
N/A
ECA: Rin Peak Detect Register 1 (RP)
Read Address:
0Chex + Base Address
ECB: Rin Peak Detect Register 1 (RP)
Read Address:
2Chex + Base Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RP7
RP6
RP5
RP4
RP3
RP2
RP1
RP0
Functional Description of Register Bits
These peak detector registers allow the user to monitor the receive in (Rin) peak signal level. The information is
in 16-bit 2’s complement linear coded format presented in two 8 bit registers for each echo canceller. The high
byte is in Register 2 and the low byte is in Register 1.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL50233QC | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4 Channel Voice Echo Cancellor |
| ZL50233QCC | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4 Channel Voice Echo Cancellor |
| ZL50233QCG1 | 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 4-CH G.165/G.168/G.711 W/ TONE DETECTION - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC VOICE ECHO CANCEL 4CH 100LQFP 制造商:Microsemi Corporation 功能描述:IC VOICE ECHO CANCEL 4CH 100LQFP |
| ZL50234 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:8 Channel Voice Echo Canceller |
| ZL50234/GDC | 制造商:Microsemi Corporation 功能描述:ECHO Canceller Chip 8-CH G.164/G.165/G.168/G.711 With Tone Detection 208-Pin LBGA Tray 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 8CH G.164/G.165/G.168/G.711 W/ TONE DETE - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC VOICE ECHO CANCEL 8CH 208LBGA 制造商:Microsemi Corporation 功能描述:IC VOICE ECHO CANCEL 8CH 208LBGA |
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