參數(shù)資料
型號: ZL30101
廠商: Zarlink Semiconductor Inc.
英文描述: T1/E1 Stratum 3 System Synchronizer
中文描述: T1/E1的Stratum 3系統(tǒng)同步
文件頁數(shù): 22/34頁
文件大?。?/td> 534K
代理商: ZL30101
ZL30101
Data Sheet
22
Zarlink Semiconductor Inc.
PLL phase slope limiter,
in-lock phase distance.
The presence of input jitter makes it difficult to define when the PLL is locked as it may not be able to align its output
to the input within the required phase distance, dependent on the PLL bandwidth and the input jitter amplitude and
frequency.
Although a short lock time is desirable, it is not always possible to achieve due to other synchronizer requirements.
For instance, better jitter transfer performance is achieved with a lower frequency loop filter which increases lock
time. And better (smaller) phase slope performance (limiter) results in longer lock times.
6.0 Applications
This section contains ZL30101 application specific details for power supply decoupling, reset operation, clock and
crystal operation.
6.1 Power Supply Decoupling
It is recommended to place a 100 nF decoupling capacitor close to the power and ground pairs as shown in Figure
11 to ensure optimal jitter performance.
Figure 11 - Recommended Power Supply Decoupling
100 nF
33
AGND
36
AVDD
25
V
DD
61
V
DD
37
AV
DD
V
CORE
12
AV
CORE
35
GND
1
AV
CORE
14
1.8 V
3.3 V
44
AV
DD
45
AV
DD
100 nF
100 nF
100 nF
29
AV
DD
41
AGND
51
AGND
23
GND
ZL30101
100 nF
100 nF
GND
13
V
CORE
2
100 nF
1
GND
100 nF
100 nF
40
GND
34
GND
100 nF
100 nF
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