參數(shù)資料
型號(hào): ZL10310
廠商: Zarlink Semiconductor Inc.
英文描述: Power Quality Recorder; Bandwidth Max:60Hz; Kit Contents:CTs, Voltage Leads, Ground Probes and Leads, PC Software and Download Cable; Voltage Rating:600V RoHS Compliant: NA
中文描述: 數(shù)字電視的DVB - T -上一芯片處理器
文件頁(yè)數(shù): 15/40頁(yè)
文件大?。?/td> 670K
代理商: ZL10310
Data Sheet
ZL10310/ZL10311
15
Zarlink Semiconductor Inc.
Note 2:
Triple DAC output can be setup using the DENCMUX register to output any of the following types of video signal:
RGB, CVBS, Y U/V
Gain set using Current Adjust resistor to GND. Typically need 392ohms for a DAC load of 37.5ohms.
Apply external reference (1.2V) when internal reference is not in use.
Note 3:
Note 4:
6.4 SDRAM Interfaces
The ZL10310 and ZL10311 devices have 2 independent SDRAM interfaces. The main SDRAM interface is
SDRAM1 which is used as the main memory space for both the PowerPC
processor and Video/Audio decoding. If
required a separate processor-only SDRAM interface can be used; this is the optional SDRAM0 interface.
All the signals for the SDRAM1 and SDRAM0 interfaces are configured as “Big Endian”, which signifies that bit [0]
on both the Address and Data buses is the Most Significant Bit (MSB).
Pin Name
Pin No.
Pin
Type
Description
Notes
SD1_ADDR[00]
D24
O
SDRAM1 Bus - Address Bit 0 (MSB)
SD1_ADDR[01]
F26
O
SDRAM1 Bus - Address Bit 1
SD1_ADDR[02]
F25
O
SDRAM1 Bus - Address Bit 2
SD1_ADDR[03]
E25
O
SDRAM1 Bus - Address Bit 3
SD1_ADDR[04]
E26
O
SDRAM1 Bus - Address Bit 4
SD1_ADDR[05]
D26
O
SDRAM1 Bus - Address Bit 5
SD1_ADDR[06]
L23
O
SDRAM1 Bus - Address Bit 6
SD1_ADDR[07]
C26
O
SDRAM1 Bus - Address Bit 7
SD1_ADDR[08]
A25
O
SDRAM1 Bus - Address Bit 8
SD1_ADDR[09]
B23
O
SDRAM1 Bus - Address Bit 9
SD1_ADDR[10]
B24
O
SDRAM1 Bus - Address Bit 10
SD1_ADDR[11]
C23
O
SDRAM1 Bus - Address Bit 11
SD1_ADDR[12]
C25
O
SDRAM1 Bus - Address Bit 12
SD1_ADDR[13]
D25
O
SDRAM1 Bus - Address Bit 13 (LSB)
SD1_DATA[00]
N24
B
SDRAM1 Bus - Data Bit 0 (MSB)
SD1_DATA[01]
N26
B
SDRAM1 Bus - Data Bit 1
SD1_DATA[02]
M25
B
SDRAM1 Bus - Data Bit 2
SD1_DATA[03]
T23
B
SDRAM1 Bus - Data Bit 3
SD1_DATA[04]
L25
B
SDRAM1 Bus - Data Bit 4
SD1_DATA[05]
K26
B
SDRAM1 Bus - Data Bit 5
SD1_DATA[06]
K24
B
SDRAM1 Bus - Data Bit 6
SD1_DATA[07]
J25
B
SDRAM1 Bus - Data Bit 7
SD1_DATA[08]
J24
B
SDRAM1 Bus - Data Bit 8
相關(guān)PDF資料
PDF描述
ZL10310DTV-SOC Digital Television DVB-T-On-a-Chip Processor
ZL10311DTV-SOC Digital Television DVB-T-On-a-Chip Processor
ZL10312QCF Satellite Demodulator
ZL10312QCG Satellite Demodulator
ZL10312QCG1 Satellite Demodulator
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL10310/GAC 制造商:Microsemi Corporation 功能描述:
ZL10310DTV-SOC 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Television DVB-T-On-a-Chip Processor
ZL10310GAC 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Television DVB-T-On-a-Chip Processor
ZL10311 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Television DVB-T-On-a-Chip Processor
ZL10311/GAC 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Television DVB-T-On-a-Chip Processor