參數(shù)資料
型號(hào): XRT91L82
廠商: Exar Corporation
英文描述: 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
中文描述: 2.488/2.666 Gbps的STS-48/STM-16的SONET / SDH收發(fā)器
文件頁數(shù): 17/59頁
文件大小: 414K
代理商: XRT91L82
xr
REV. P1.0.5
PRELIMINARY
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82
14
SERIAL MICROPROCESSOR INTERFACE
N
AME
L
EVEL
T
YPE
P
IN
D
ESCRIPTION
HOST/HW
LVTTL,
LVCMOS
I
N2
Host or Hardware Mode Select Input
The XRT91L82 offers two modes of operation for interfacing to
the device. The Host mode uses a serial microprocessor inter-
face for programming individual registers. The Hardware mode
is controlled by the state of the hardware pins set by the user.
When left unconnected, by default, the device is configured in
the Hardware mode.
"Low" = Hardware Mode
"High" = Host Mode
This pin is provided with an internal pull-down.
TXSCLKOOFF
/ CS
LVTTL,
LVCMOS
I
C9
Chip Select Input (Host Mode Only)
Active "Low" signal. This signal enables the serial microproces-
sor interface by pulling chip select "Low". The serial micropro-
cessor is disabled when the chip select signal returns "High".
N
OTES
:
1.
The serial microprocessor interface does
not
support burst
mode. Chip Select must be de-asserted after each opera-
tion cycle.
2.
Chip Select is only active in Host Mode.
This pin is provided with an internal pull-up.
REFREQSEL1
/ SCLK
LVTTL,
LVCMOS
I
D12
Serial Clock Input (Host Mode Only)
Once CS is pulled "Low", the serial microprocessor interface
requires 16 clock cycles for a complete Read or Write operation.
Serial Clock Input is only active in Host Mode.
This pin is provided with an internal pull-down.
LOOPTM_NOJA
/ SDI
LVTTL,
LVCMOS
I
C10
Serial Data Input (Host Mode Only)
When CS is pulled "Low", the serial data input is sampled on the
rising edge of SCLK.
Serial Data Input is only active in Host Mode.
This pin is provided with an internal pull-down.
PRBS_ERR
/ SDO
LVCMOS
O
E9
Serial Data Output (Host Mode Only)
If a Read function is initiated, the serial data output is updated
on the falling edge of SCLK8 through SCLK15, with the LSB
(D0) updated first. This enables the data to be sampled on the
rising edge of SCLK9 through SCLK16.
Serial Data Output is only active in Host Mode.
TXSWING
/ INT
LVCMOS
O
D10
Interrupt Output (Host Mode Only)
Active "Low" signal. This signal is asserted "Low" when a
change in alarm status occurs. Once the status registers have
been read, the interrupt pin will return "High".
Interrupt Output is only active in Host Mode.
N
OTE
:
This pin is an open drain output and requires an external
pull-up resistor.
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