參數(shù)資料
型號: XRT91L82
廠商: Exar Corporation
英文描述: 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
中文描述: 2.488/2.666 Gbps的STS-48/STM-16的SONET / SDH收發(fā)器
文件頁數(shù): 16/59頁
文件大?。?/td> 414K
代理商: XRT91L82
XRT91L82
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
PRELIMINARY
xr
REV. P1.0.5
13
N
OTE
:
For VDD
IO
=3.3V, all input control pins are LVCMOS and LVTTL compatible. All output control pins are LVCMOS
compatible only.
RXCAP1P
Analog
I
E1
External Receive Loop Filter
Hardware Mode
This pin is required for the external loop filter
capacitor and resistors. See Figure 5 on page 19.
Host Mode - No Connect
This pin is not connected in Host Mode.
RXCAP1N
/ CP_OUT
Analog
I/O
F1
External Receive Loop Filter
Hardware Mode
This pin is required for the external loop filter
capacitor and resistors. See Figure 5 on page 19.
Host Mode - Charge Pump Output (for external VCXO)
The nominal output of the charge pump current is 250
μ
A.
POWER AND GROUND
N
AME
T
YPE
P
IN
D
ESCRIPTION
AVDD_RX
PWR
C1, D2, G2, H1
Analog 1.8V Receiver Power Supply
AVDD_RX should be isolated from the digital power supplies. For
best results, use a ferrite bead along with an internal power plane
separation. The AVDD_RX power supply pins should have
bypass capacitors to the nearest ground.
AVDD_TX
PWR
C14, D13, G13, H14
Analog 1.8V Transmitter Power Supply
AVDD_TX should be isolated from the digital power supplies. For
best results, use a ferrite bead along with an internal power plane
separation. The AVDD_TX power supply pins should have
bypass capacitors to the nearest ground.
VDD_CML
PWR
A4, A7, A10, A12, B3, B5,
B7, B9, C11, C13
CML 1.8V Power Supply
These pins require a 1.8V potential.
VDD_CMOS
PWR
E6, E8, F3, F5, F7, F9, J4,
J7, M6, M9, M12
Digital 1.8V Power Supply
VDD_CMOS should be isolated from the analog power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The VDD_CMOS power supply pins should
have bypass capacitors to the nearest ground.
VDD_IO
PWR
G3, G9, J1, J11, K3, K6,
K9, K13, M3, N1, N4, N11,
N14
3.3V LVPECL/ 3.3V LVDS Input /Output Bus Power Supply
and 3.3V Digital I/O Power Supply
These pins require a 3.3V potential in LVPECL or LVDS opera-
tion. These pins also power the 3.3V Digital I/O Power Supply.
GND
GND
A1, A14, B1, B2, B4, B6,
B8, B10, B12, B14, D1,
D14, E2, E7, E13, F2, F4,
F6, F8, F10, F13, G1, G6,
G14, H2, H5, H10, H13, L1,
L4, L11, L14, N8, P3, P6,
P9, P12
Ground for 3.3V / 1.8V Digital Power Supplies
It is recommended that all ground pins of this device be tied
together.
RECEIVER SECTION
N
AME
L
EVEL
T
YPE
P
IN
D
ESCRIPTION
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