- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376464 > XRT91L32 (Exar Corporation) STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER PDF資料下載
參數(shù)資料
| 型號： | XRT91L32 |
| 廠商： | Exar Corporation |
| 英文描述： | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| 中文描述： | STS-12/STM-4或STS-3/STM-1的SONET / SDH收發(fā)器 |
| 文件頁數(shù)： | 28/37頁 |
| 文件大?。?/td> | 417K |
| 代理商： | XRT91L32 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁
XRT91L32
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
xr
REV. 1.0.2
26
4.0
DIAGNOSTIC FEATURES
4.1
The serial remote loopback function is activated by setting RLOOPS "High". When serial remote loopback is
activated, the high-speed serial receive data from RXIP/N is presented at the high speed transmit output
TXOP/N, and the high-speed recovered clock is selected and presented to the high-speed transmit clock input
of the Retimer. During serial remote loopback, the high-speed receive data (RXIP/N) is also converted to
parallel data and presented at the low-speed receive parallel interface RXDO[7:0]. The recovered receive clock
is also divided by 8 and presented at the low-speed clock output RXPCLKO to synchronize the transfer of the
8-bit received parallel data. A simplified block diagram of serial remote loopback is shown in Figure 16.
Serial Remote Loopback
4.2
The digital local loopback is activated when the DLOOP signal is set "High." When digital local loopback is
activated, the high-speed data from the output of the parallel to serial converter is looped back and presented
to the high-speed input of the receiver serial to parallel converter. The CMU output is also looped back to the
receive section and is used to synchronize the transfer of the data through the receiver. In Digital loopback
mode, the transmit data from the transmit parallel interface TXDI[7:0] is serialized and presented to the high-
speed transmit output TXOP/N using the high-speed 622.08/155.52 MHz transmit clock generated from the
clock multiplier unit and presented to the input of the Retimer and SIPO. A simplified block diagram of digital
loopback is shown in Figure 17. Receive Data mute upon LOS, as shown in Figure 7, applies to Digital Local
Digital Local Loopback
Loopback Mode
F
IGURE
16. S
ERIAL
R
EMOTE
L
OOPBACK
F
IGURE
17. D
IGITAL
L
OCAL
L
OOPBACK
PISO
Re-Timer
LVPECL
Output Drivers
SIPO
CDR
LVPECL
Input Drivers
Serial Remote Loopback
RX Parallel Output
TX Serial Output
RX Serial Input
PISO
Re-Timer
LVPECL
Output Drivers
SIPO
CDR
LVPECL
Input Drivers
Digital Loopback
TX Parallel Input
RX Parallel Output
TX Serial Output
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT91L32IQ-F | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L80 | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L80_0507 | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L80IB | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L81 | 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT91L32ES | 功能描述:LIN 收發(fā)器 SONET SDH 8 bit TRANCEIVER RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
| XRT91L32IQ | 功能描述:LIN 收發(fā)器 SONET SDH 8 bit TRANCEIVER RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
| XRT91L32IQ-F | 功能描述:總線收發(fā)器 8-Bit TTL 3.3V temp -45 to 85C;UART RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L32IQTR | 功能描述:LIN 收發(fā)器 PHY Transceiver RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
| XRT91L32IQTR-F | 功能描述:LIN 收發(fā)器 PHY Transceiver RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。