參數(shù)資料
型號： XRT86VL3X_07
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 92/153頁
文件大?。?/td> 1316K
代理商： XRT86VL3X_07
XRT86VL3X
85
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
REV. 1.2.2
8.3
Brief Discussion of Robbed-bit Signaling in DS1 Framing Format
Signaling is required when dealing with voice and dial-up data services in DS1 applications. Traditionally,
signaling is provided on a dial-up telephone line, across the talk-path. Bit robbing, or stealing the least
significant bit (8th bit) in each of the twenty-four voice channels in the signaling frames allows enough bits to
signal between the transmitting and receiving end. That is where the name Robbed-bit signaling comes from.
These ends can be CPE to central office (CO) for switched services, or CPE to CPE for PBX-to-PBX
connections.
Signaling is used to tell the receiver where the call or route is destined. The signal is sent through switches
along the route to a distant end. Common types of signals are:
On hook
Off hook
Dial tone
Dialed digits
Ringing cycle
Busy tone
Robbed-bit Signaling is supported in three DS1 framing formats.
Super-Frame (SF)
SLC96
Extended Super-Frame (ESF)
In Super-Frame or SLC96 framing mode, frame number 6 and frame number 12 are signaling frames. In
channelized DS1 applications, these frames are used to contain the signaling information. In frame number 6
and 12, the least significant bit of all twenty-four timeslots is 'robbed' to carry call state information. The bit in
frame 6 is called the A bit and the bit in frame 12 is called the B bit. The combination of A and B defines the
state of the call for the particular timeslot that these two bits are located in.
F
IGURE
92. W
AVEFORMS
FOR
C
ONNECTING
THE
R
ECEIVE
M
ULTIPLEXED
H
IGH
-S
PEED
I
NPUT
I
NTERFACE
AT
HMVIP
AND
H.100 16.384M
BIT
/
S
MODE
RxSerClk (16.384MHz)
RxSerClk (INV)
RxSer
1
2
1
2
5
2
5
2
1
0
1
0
2
0
2
0
X
y
: X is the bit number and y is the channel number
3
0
4
0
3
0
4
0
5
0
5
0
6
0
6
0
7
3
7
3
8
3
8
3
F
0
F
1
F
0
F
1
F
2
F
2
F
3
F
3
56 cycles
5
3
5
3
6
3
6
3
7
3
7
3
8
3
8
3
0
0
A
2
A
2
0 0 0 0
0
0
0
0
A
0
A
0
B
0
B
0
C
3
C
3
D
3
D
3
1
1
1
1
1 1 1 1
56 cycles
A
3
A
3
B
3
B
3
C
3
C
3
D
3
D
3
RxSig
Start of Frame
RxSync(input)
H.100, negative sync
RxSync(input)
H.100, positive sync
RxSync(input)
HMVIP, negative sync
RxSync(input)
HMVIP, positive sync
相關(guān)PDF資料
PDF描述
XRT86VL3X Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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