參數(shù)資料
型號: XRT86VL3X_07
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 25/153頁
文件大小: 1316K
代理商: XRT86VL3X_07
XRT86VL3X
18
REV. 1.2.2
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
2.1.3
Digital Loopback
With digital loopback activated, the transmit input data at TCLK/TPOS/TNEG is looped back to the receive
output data at RCLK/RPOS/RNEG. The digital loopback mode includes the Transmit JA (if enabled). The
receive input data at RTIP/RRING is ignored while valid transmit output data continues to be sent to the line. A
simplified block diagram of digital loopback is shown in
Figure 24
.
2.1.4
Dual Loopback
With dual loopback activated, the remote loopback is combined with the digital loopback. A simplified block
diagram of dual loopback is shown in
Figure 25
.
F
IGURE
24. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
D
IGITAL
L
OOPBACK
F
IGURE
25. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
D
UAL
L
OOPBACK
Encoder
Decoder
Timing
Control
Data and
Clock
Recovery
JA
JA
Tx
Rx
TAOS
NLC/PRBS/QRSS
TTIP
TRING
RTIP
RRING
TCLK
TPOS
TNEG
RCLK
RPOS
RNEG
Encoder
Decoder
Timing
Control
Data and
Clock
Recovery
JA
JA
Tx
Rx
TAOS
NLC/PRBS/QRSS
TTIP
TRING
RTIP
RRING
TCLK
TPOS
TNEG
RCLK
RPOS
RNEG
相關(guān)PDF資料
PDF描述
XRT86VL3X Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT91L30_0611 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L306 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L30IQ STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L30 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
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