TABLE
參數(shù)資料
型號： XRT83L38IB-F
廠商： Exar Corporation
文件頁數(shù)： 65/87頁
文件大?。?/td> 0K
描述： IC LIU T1/E1/J1 OCTAL 225BGA
標準包裝： 84
類型： 線路接口裝置（LIU）
驅(qū)動器/接收器數(shù)： 8/8
規(guī)程： T1，E1，J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 225-BGA
供應商設(shè)備封裝： 225-BGA（19x19）
包裝： 托盤
XRT83L38
65
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.2
TABLE 33: MICROPROCESSOR REGISTER #14, BIT DESCRIPTION
REGISTER ADDRESS
00001110
00011110
00101110
00111110
01001110
01011110
01101110
01111110
CHANNEL_n
CHANNEL_0
CHANNEL_1
CHANNEL_2
CHANNEL_3
CHANNEL_4
CHANNEL_5
CHANNEL_6
CHANNEL_7
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
Reserved
R/W
0
D6-D0
B6S7_n -
B0S7_n
Arbitrary Transmit Pulse Shape, Segment 7
The shape of each channel's transmitted pulse can be made
independently user programmable by selecting “Arbitrary
Pulse” mode in
Table 5. The arbitrary pulse is divided into
eight time segments whose combined duration is equal to one
period of MCLK.
This 7 bit number represents the amplitude of the nth chan-
nel's arbitrary pulse during the seventh time segment.
B6S7_n-B0S7_n is in signed magnitude format with B6S7_n
as the sign bit and B0S7_n as the least significant bit (LSB).
R/W
0
TABLE 34: MICROPROCESSOR REGISTER #15, BIT DESCRIPTION
REGISTER ADDRESS
00001111
00011111
00101111
00111111
01001111
01011111
01101111
01111111
CHANNEL_n
CHANNEL_0
CHANNEL_1
CHANNEL_2
CHANNEL_3
CHANNEL_4
CHANNEL_5
CHANNEL_6
CHANNEL_7
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
Reserved
R/W
0
D6-D0
B6S8_n -
B0S8_n
Arbitrary Transmit Pulse Shape, Segment 8
The shape of each channel's transmitted pulse can be made
independently user programmable by selecting “Arbitrary
Pulse” mode in
Table 5. The arbitrary pulse is divided into
eight time segments whose combined duration is equal to one
period of MCLK.
This 7 bit number represents the amplitude of the nth chan-
nel's arbitrary pulse during the eighth time segment. B6S8_n-
B0S8_n is in signed magnitude format with B6S8_n as the
sign bit and B0S8_n as the least significant bit (LSB).
R/W
0
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