參數(shù)資料
型號： XRT79L74IB
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
中文描述： ATM NETWORK INTERFACE, PBGA456
封裝： 27 X 27 MM, 1 MM PITCH, PLASTIC, BGA-456
文件頁數(shù)： 29/70頁
文件大?。?/td> 547K
代理商： XRT79L74IB
PRELIMINARY
XRT79L74
REV. P1.0.0
4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
27
J2
E25
K3
G25
RxLOS1
RxLOS2
RxLOS3
RxLOS4
O
O
O
O
Framer/UNI - Loss of Signal Output Indicator:
These pins are asserted when the Receive Section of the XRT79L74 encoun-
ters 180 consecutive 0’s (for DS3 applications) or 32 consecutive 0’s (for E3
applications) via the RxPOS and RxNEG pins. These pins will be negated once
the Receive DS3/E3 Framer has detected at least 60 "1s" out of 180 consecu-
tive bits (for DS3 applications) or has detected at least four consecutive 32 bit
strings of data that contain at least 8 "1s" in the receive path.
E2
D22
G4
B26
RxPRED1
RxPRED2
RxPRED3
RxPRED4
OO
O
O
O
Receiver Red Alarm Indicator - Receive PLCP Processor:
The XRT79L74 device will assert this output pin (e.g., toggle it "high")
anytime (and for the duration that) the Receive PLCP Processor block is
currently declaring any of the following defect conditions. PLCP OOF - Out of
Frame Defect Condition
PLCP LOF - Loss of Frame Defect Condition
Conversely, the XRT79L74 device will negate this output pin (e.g.,
toggle it "low") anytime (and for the duration that) the Receive PLCP
Processor block is NOT declaring any of the above-mentioned defect
conditions.
N
OTE
:
These output pins are only valid if the XRT79L74 has been configured to
operate in the ATM/PLCP Mode.
F1
E22
H1
D24
RxPOOF1
RxPOOF2
RxPOOF3
RxPOOF4
O
O
O
O
Receive PLCP Processor Block - PLCP Out of Frame Defect Indicator:
The XRT79L74 device will assert this output pin (e.g., toggle it "high") anytime
(and for the duration that) the Receive PLCP Processor block is currently
declaring the PLCP OOF (Out of Frame) defect condition.
Conversely, the XRT79L74 device will negate this output pin (e.g., toggle it
"low") anytime (and for the duration that) the Receive PLCP Processor block is
NOT declaring the PLCP OOF defect condition.
N
OTE
:
These output pins are only active if the XRT79L74 has been configured
to operate in both the UNI and PLCP Mode.
E3
E21
G5
C25
RxPLOF1
RxPLOF2
RxPLOF3
RxPLOF4
O
O
O
O
Receive PLCP Processor Block - PLCP Loss of Frame Defect Indicator
Output
The XRT79L74 device will assert this output pin (e.g., toggle it "high")
anytime (and for the duration that) the Receive PLCP Processor block
is currently declaring the PLCP LOF (Loss of Frame) defect
condition.Conversely, the XRT79L74 device will negate this output pin
(e.g., toggle it "low") anytime (and for the duration that) the Receive
PLCP Processor block is NOT declaring the PLCP LOF defect
condition.
N
OTE
:
These output pins are only active is the XRT79L74 has been configured
to operate in the ATM/PLCP Mode.
P
IN
#
N
AME
TYPE
D
ESCRIPTION
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