參數(shù)資料
型號(hào)： XRT79L74IB
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
中文描述： ATM NETWORK INTERFACE, PBGA456
封裝： 27 X 27 MM, 1 MM PITCH, PLASTIC, BGA-456
文件頁(yè)數(shù)： 22/70頁(yè)
文件大?。?/td> 547K
代理商： XRT79L74IB
XRT79L74
REV. P1.0.0
PRELIMINARY
4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
20
B7
TxUSoC/
TxPSoP
I
Transmit UTOPIA - Start of Cell Input/Transmit POS-PHY - Start of Packet
Input:
The function of this input signal depends upon whether the XRT79L74 has been
configured to operate in the ATM UNI or in the PPP Mode.
ATM UNI Mode Operation - TxUSoC:
This input pin is driven by the ATM Layer Processor and is used to indicate the
start of an ATM cell that is being transmitted from the ATM Layer Processor. This
input pin must be pulsed "High" whenever the first byte (or word) of a new cell is
present on the Transmit UTOPIA Data Bus (TxUData[15:0]). This input pin must
remain "Low" at all other times.
PPP Mode Operation - TxPSoP/TxPSoC:
If the XRT79L74 has been configured to operate in the Packet-Mode, then this
input pin is pulsed "High" to denote that the first byte (or word) of a given packet
is placed on the TxPData[15:0] input pins.If the XRT79L74 has been configured
to operate in the Cell-Chunk Mode, then this input pin is pulsed "High" to denote
that the first byte of a packet chunk, if placed on the TxPData[15:0] input pins.
N
OTE
:
This input pin is only valid if the XRT79L74 has been configured to
operate in the PPP Mode.
B11
TxTSX/
TxPSOF
I
Transmit - Change of Port Indicator Input/Transmit - Start of PPP
Packet (in Chunk Mode):
The exact function of this input pin depends upon whether the XRT79L74
device has been configured to operate in the Packet Mode or Cell-Chunk
Mode, as is described below.
Packet Mode - TxTSX - Transmit POS-PHY Interface - Change of
Port Indicator Output (POS-PHY Level 3, Packet Mode only):
The Link-Layer processor pulses this input pin "high" when an "in-band"
port address is present on the "TxPData[15:11]" bus input pins. When
this input pin and "TxPENB*" are both set "high" then the value of
"TxPData[15:11]" is the address value of the TxFIFO (Transmit POS-PHY
Port) to be selected. Subsequent write operations, into "TxPData[15:0]"
will fill the TxFIFO (within the Transmit POS-PHY Port) corresponding to
this particular "in-band" address.
Chunk Mode - TxPSOF - Receive Start of Packet Input Indicator:
The Link Layer processor pulses this input pin "high" in order to indicate
that the first byte (or 16-bit word) of a given Packet is placed on the
"TxPData[15:0]" pins.
N
OTE
:
This input pin is only active if the XRT79L74 device has been configured to
operate in the POS-PHY Level 3, Packet Mode or in the Chunk Mode. If
the user intends to operate the XRT79L74 device in any other mode, then
he/she should tie this input pin to GND.
A7
TxUClkO/
TxPClkO
O
Transmit UTOPIA Interface Clock/Transmit POS-PHY Interface Clock Out-
put:
This output is derived from an internal PLL.
P
IN
#
N
AME
TYPE
D
ESCRIPTION
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