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XRT79L71
PRELIMINARY
459
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
However, the Transmit Section of the XRT79L71 can also be configured to externally accept values via a
certain input port and to insert this data into certain user specified overhead bits, within the outbound E3 data-
stream. The XRT79L71 permits the user to implement this overhead bit insertion by either of the following
methods.
By configuring the Transmit Section of the XRT79L71 to accept E3 overhead data via the Transmit Payload
By configuring the Transmit Section of the XRT79L71 to accept DS3 overhead data via the Transmit
Overhead Data Input Interface.
The purpose of the Transmit Overhead Data Input Interface block is to accept overhead data from some
system-side or up-stream source and to overwrite the contents of the overhead bits/bytes, within the outbound
E3 data-stream with these particular overhead bit/byte values.
TABLE 58: HOW THE TRANSMIT E3 FRAMER BLOCK INTERNALLY GENERATES EACH OF THE OVERHEAD BITS/BYTES -
E3, ITU-T G.832 APPLICATIONS
BIT NAME
BIT/BYTE DESCRIPTION
HOW OVERHEAD BIT IS INTERNALLY GENERATED BY THE
TRANSMIT E3 FRAMER BLOCK
FA1 Byte[7:0]
Framing Alignment Byte # 1
This byte is set to the value "0xF6"
FA2 Byte[7:0]
Framing Alignment Byte # 2
This byte is set to the value "0x28"
EM Byte[7:0]
Error Monitor Byte
The Transmit E3 Framer will perform a BIP-8 calculation over
an entire E3 frame. The results of this calculation will be
inserted into the EM byte within the very next frame.
TR Byte[7:0]
Trail Trace Byte
These bits carry the Trail Trace Message that is generated by
the Trail Trace Message Controller within the Transmit Section
of the XRT79L71.
FERF/RDI - MA Byte[1]
Far-End Receive Failure/
Remote Defect Indicator
Either Software Controlled or automatically set to "1" whenever
the corresponding Receive E3 Framer block declare the LOS,
LOF/OOF or AIS defect condition.
FEBE/REI - MA Byte[2]
Far-End Block Error/Remote
Error Indicator
Either Software Controller or automatically set to "1" whenever
the corresponding Receive E3 Framer block detects an EM
byte error within its incoming E3 data-stream.
Payload_Type[2:0] - MA
Byte[3:5]
Payload Type Indicator
These bits are Software-Controlled via an on-chip Register.
SSM Multi-Frame Indica-
tor[1:0] - MA Byte[6:7]
SSM Multi-Frame Indicator
SSM Bit - MA Byte[8]
SSM Channel
This bit carries the Synchronization Status Message that is gen-
erated by the SSM Controller within the Transmit Section of the
XRT79L71
NR Byte[7:0]
Network Operator Byte
These bits are either Software-Controlled via an on-chip Regis-
ter or they can be configured to carry the PMDL/LAPD Mes-
sage that is generated by the Transmit LAPD Controller within
the Transmit Section of the XRT79L71.
GC Byte[7:0]
General Purpose
Communication Byte
These bits are either Software-Controlled via an on-chip Regis-
ter or they can be configured to carry the PMDL/LAPD Mes-
sage that is generated by the Transmit LAPD Controller within
the Transmit Section of the XRT79L71.