參數資料
| 型號： | XRT75R12IB |
| 廠商： | Exar Corporation |
| 文件頁數： | 77/90頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E3/DS3/STS-1 12CH 420TBGA |
| 標準包裝： | 40 |
| 類型： | 線路接口裝置（LIU） |
| 驅動器/接收器數： | 12/12 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 420-LBGA 裸露焊盤 |
| 供應商設備封裝： | 420-TBGA（35x35） |
| 包裝： | 托盤 |
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XRT75R12
76
REV. 1.0.4
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
2
LOSMUT Enable
R/W
Muting upon LOS Enable - Channel_n:
This READ/WRITE bit-field is used to configure the Receive Section (within
Channel_n) to automatically pull their corresponding Recovered Data Out-
put pins (e.g., RxPOS_n and RxNEG_n) to GND for the duration that the
Receive Section declares the LOS defect condition. In other words, this fea-
ture (if enabled) will cause the Receive Channel to automatically mute the
Recovered data anytime the Receive Section declares the LOS defect con-
dition.
0 - Disables the Muting upon LOS feature. In this setting the Receive Sec-
tion will NOT automatically mute the Recovered Data whenever it is declar-
ing the LOS defect condition.
1 - Enables the Muting upon LOS feature. In this setting the Receive Sec-
tion will automatically mute the Recovered Data whenever it is declaring the
LOS defect condition.
1
Receive Monitor
Mode Enable
R/W
Receive Monitor Mode Enable - Channel_n:
This READ/WRITE bit-field is used to configure the Receive Section of
Channel_n to operate in the Receive Monitor Mode.
If the user configures the Receive Section to operate in the Receive Monitor
Mode, then it will be able to receive a nominal DSX-3/STSX-1 signal that
has been attenuated by 20dB of flat loss along with 6dB of cable loss, in an
error-free manner. However, internal LOS circuitry is suppressed and LOS
will never assert nor LOS be declared when operating under this mode.
0 - Configures the corresponding channel to operate in the Normal Mode.
1 - Configure the corresponding channel to operate in the Receive Monitor
Mode.
0
Receive Equalizer
Enable
R/W
Receive Equalizer Enable - Channel_n:
This READ/WRITE register bit is used to enable or disable the Receive
Equalizer block within the Receive Section of Channel_n, as listed below.
0 - Disables the Receive Equalizer within the corresponding channel.
1 - Enables the Receive Equalizer within the corresponding channel.
NOTE: For virtually all applications, we recommend that the user set this bit-
field to "1" (for all channels) and enable the Receive Equalizer.
TABLE 38: RECEIVE CONTROL REGISTER - CHANNEL n ADDRESS LOCATION = 0XM5
(n = [0:11] & M= 0-5 & 8-D)
BIT NUMBER
NAME
TYPE
DESCRIPTION
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相關代理商/技術參數 |
參數描述 |
|---|---|
| XRT75R12IB-F | 功能描述:外圍驅動器與原件 - PCI 12 Channel 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT75R12IB-L | 功能描述:LIN 收發(fā)器 Attenuator RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
| XRT75VL00 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75VL00_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75VL00D | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
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