參數(shù)資料
型號(hào): XRT75R12DIB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述: DATACOM, PCM TRANSCEIVER, PBGA420
封裝: 35 X 35 MM, TBGA-420
文件頁數(shù): 76/131頁
文件大小: 717K
代理商: XRT75R12DIB
XRT75R12D
REV. P1.0.1
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
PRELIMINARY
71
5
Digital LOS Defect
Declared
R/O
Digital LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the Digital LOS
(Loss of Signal) detector is declaring the LOS Defect condition.
For DS3 and STS-1 applications, the Digital LOS Detector will declare
the LOS Defect condition whenever it detects an absence of pulses
(within the incoming DS3 or STS-1 data-stream) for 160 consecutive
bit-periods.
Further, (again for DS3 and STS-1 applications) the Digital LOS Detec-
tor will clear the LOS Defect condition whenever it determines that the
pulse density (within the incoming DS3 or STS-1 signal) is at least
33%.
0 - Indicates that the Digital LOS Detector is NOT declaring the LOS
Defect Condition.
1 - Indicates that the Digital LOS Detector is currently declaring the
LOS Defect condition.
N
OTES
:
1.
LOS Detection (within each channel of the XRT75R12D) is
performed by both an Analog LOS Detector and a Digital LOS
Detector. The LOS state of a given Channel is simply a
WIRED-OR of the LOS Defect Declare states of these two
detectors.
2.
The current LOS Defect Condition (for the channel) can be
determined by reading out the contents of Bit 1 (Receive LOS
Defect Declared) within this register.
4
Analog LOS Defect
Declared
R/O
Analog LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the Analog LOS
(Loss of Signal) detector is declaring the LOS Defect condition.
For DS3 and STS-1 applications, the Analog LOS Detector will declare
the LOS Defect condition whenever it determines that the amplitude of
the pulses (within the incoming DS3/STS-1 line signal) drops below a
certain Analog LOS Defect Declaration threshold level.
Conversely, (again for DS3 and STS-1 applications) the Analog LOS
Detector will clear the LOS Defect condition whenever it determines
that the amplitude of the pulses (within the incoming DS3/STS-1 line
signal) has risen above a certain Analog LOS Defect Clearance
threshold level.
It should be noted that, in order to prevent "chattering" within the Ana-
log LOS Detector output, there is some built-in hysteresis between the
Analog LOS Defect Declaration and the Analog LOS Defect Clearance
threshold levels.
0 - Indicates that the Analog LOS Detector is NOT declaring the LOS
Defect Condition.
1 - Indicates that the Analog LOS Detector is currently declaring the
LOS Defect condition.
N
OTES
:
1.
LOS Detection (within each channel of the XRT75R12D) is
performed by both an Analog LOS Detector and a Digital LOS
Detector. The LOS state of a given Channel is simply a
WIRED-OR of the LOS Defect Declare states of these two
detectors.
2.
The current LOS Defect Condition (for the channel) can be
determined by reading out the contents of Bit 1 (Receive LOS
Defect Declared) within this register.
B
IT
N
UMBER
N
AME
T
YPE
D
ESCRIPTION
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