參數(shù)資料
型號： XRT73R12
廠商： Exar Corporation
英文描述： TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述： 第十二章通道E3/DS3/STS-1線路接口單元
文件頁數(shù)： 74/87頁
文件大?。?/td> 436K
代理商： XRT73R12
XRT73R12
REV. P1.0.3
PRELIMINARY
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
71
5
Digital LOS Defect
Declared
R/O
Digital LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the Digital LOS
(Loss of Signal) detector is declaring the LOS Defect condition.
For DS3 and STS-1 applications, the Digital LOS Detector will declare
the LOS Defect condition whenever it detects an absence of pulses
(within the incoming DS3 or STS-1 data-stream) for 160 consecutive
bit-periods.
Further, (again for DS3 and STS-1 applications) the Digital LOS Detec-
tor will clear the LOS Defect condition whenever it determines that the
pulse density (within the incoming DS3 or STS-1 signal) is at least
33%.
0 - Indicates that the Digital LOS Detector is NOT declaring the LOS
Defect Condition.
1 - Indicates that the Digital LOS Detector is currently declaring the
LOS Defect condition.
N
OTES
:
1.
LOS Detection (within each channel of the XRT73R12) is
performed by both an Analog LOS Detector and a Digital LOS
Detector. The LOS state of a given Channel is simply a
WIRED-OR of the LOS Defect Declare states of these two
detectors.
2.
The current LOS Defect Condition (for the channel) can be
determined by reading out the contents of Bit 1 (Receive LOS
Defect Declared) within this register.
4
Analog LOS Defect
Declared
R/O
Analog LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the Analog LOS
(Loss of Signal) detector is declaring the LOS Defect condition.
For DS3 and STS-1 applications, the Analog LOS Detector will declare
the LOS Defect condition whenever it determines that the amplitude of
the pulses (within the incoming DS3/STS-1 line signal) drops below a
certain Analog LOS Defect Declaration threshold level.
Conversely, (again for DS3 and STS-1 applications) the Analog LOS
Detector will clear the LOS Defect condition whenever it determines
that the amplitude of the pulses (within the incoming DS3/STS-1 line
signal) has risen above a certain Analog LOS Defect Clearance
threshold level.
It should be noted that, in order to prevent "chattering" within the Ana-
log LOS Detector output, there is some built-in hysteresis between the
Analog LOS Defect Declaration and the Analog LOS Defect Clearance
threshold levels.
0 - Indicates that the Analog LOS Detector is NOT declaring the LOS
Defect Condition.
1 - Indicates that the Analog LOS Detector is currently declaring the
LOS Defect condition.
N
OTES
:
1.
LOS Detection (within each channel of the XRT73R12) is
performed by both an Analog LOS Detector and a Digital LOS
Detector. The LOS state of a given Channel is simply a
WIRED-OR of the LOS Defect Declare states of these two
detectors.
2.
The current LOS Defect Condition (for the channel) can be
determined by reading out the contents of Bit 1 (Receive LOS
Defect Declared) within this register.
B
IT
N
UMBER
N
AME
T
YPE
D
ESCRIPTION
相關(guān)PDF資料
PDF描述
XRT73R12IB TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT73R12_07 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73R12_0710 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73R12ES 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT73R12IB 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT73R12IB-F 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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