參數(shù)資料
型號： XRT73LC00A
廠商： Exar Corporation
英文描述： E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述： E3/DS3/STS-1線路接口單元
文件頁數(shù)： 43/53頁
文件大?。?/td> 376K
代理商： XRT73LC00A
xr
XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
PRELIMINARY
REV. P1.0.0
40
The Digital Local Loop-Back Mode, along with the Tx-
OFF feature, is useful in Redundancy System De-
sign. These two features permit the system to exe-
cute some diagnostic tests in the Back-up Line Card
without transmitting data onto the line and interfering
with the DS3/E3/STS-1 traffic from the Primary Line
Card.
The XRT73LC00A can be configured to operate in
the Digital Local Loop-Back Mode by employing ei-
ther one of the following two-steps.
A. If the XRT73LC00A is operating in the HOST
Mode
Access the Microprocessor Serial Interface and write
a “1” into both the LLB and RLB bit-fields in Com-
mand Register 4.
B. If the XRT73LC00A is operating in the Hard-
ware Mode
Set both the LLB input pin (pin 14) and the RLB input
pin (pin 15) to “High”.
N
OTES
:
1. The Digital Local Loop-Back Mode feature works
even if the transmitter is turned off via the TXOFF
feature.
2. The XRT73LC00A automatically declares an LOS
Condition any time it has been configured to oper-
ate in either the Analog Local Loop-Back or Digital
Local Loop-Back Modes. Consequently, the Muting
-upon -LOS must be disabled prior to configuring
the device to operate in either of these local Loop-
Back modes.
T
HE
R
EMOTE
L
OOP
-B
ACK
M
ODE
When the XRT73LC00A is configured to operate in
the Remote Loop-Back Mode, it ignores any signals
that are input to the TPDATA and TNDATA input pins.
The XRT73LC00A receives the incoming line signal
via the RTIP and RRING input pins. This data is pro-
cessed through the Receive Section of the
XRT73LC00A and outputs to the Receive Terminal
Equipment via the RPOS, RNEG, RCLK1 and RCLK2
output pins. Additionally, this data is internally looped
back into the Pulse-Shaping block in the Transmit
Section. At this point, this data is routed through the
remainder of the Transmit Section of the
XRT73LC00A and transmitted out onto the line via
the TTIP and TRING output pins.
Figure 31 illustrates the path that the data takes in the
XRT73LC00A when the chip is configured to operate
in the Remote Loop-Back Mode.
4.3
F
IGURE
30. T
HE
D
IGITAL
L
OCAL
L
OOP
-B
ACK
PATH
IN
THE
XRT73LC00A
AGC/
Equalizer
Peak
Detector
LOS Detector
Slicer
Clock
Recovery
Data
Recovery
Invert
Loop MUX
HDB3/
B3ZS
Decoder
LOSTHR
SDI
SDO/LCV
SCLK
CS
REGRESET
RTIP
RRING
REQDIS
RCLK1
RCLK2
RPOS
RNEG
DR/SR
RLOS
LLB
RLB
ENDECDIS
TAOS
TPDATA
TNDATA
TCLK
RLOL EXCLK
Device
Monitor
MTIP
MRING
Transmit
Logic
Duty Cycle Adjust
TXLEV
TXOFF
DMO
TTIP
TRING
Pulse
Shaping
HDB3/
B3ZS
Encoder
Serial
Processor
Interface
Digital Local
Loop-Back Path
COMMAND REGISTER CR4 (ADDRESS = 0X04)
D4
D3
D2
D1
D0
X
STS-1/DS3
E3
LLB
RLB
X
X
X
1
1
相關(guān)PDF資料
PDF描述
XRT73LC00AIV E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73LC03A 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73LC03AIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73LC04A 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73LC04AIV 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT73LC00A_08 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73LC00AES 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT73LC00AIV 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT73LC00AIV-F 功能描述:外圍驅(qū)動器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT73LC00AIVTR 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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