參數(shù)資料
型號(hào)： XRT73LC00A
廠商： Exar Corporation
英文描述： E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述： E3/DS3/STS-1線路接口單元
文件頁(yè)數(shù)： 4/53頁(yè)
文件大?。?/td> 376K
代理商： XRT73LC00A
XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.0
PRELIMINARY
II
C
OMMAND
R
EGISTER
CR2 (A
DDRESS
= 0
X
02) ............................................................................................ 25
2.4.1 Enabling the Transmit Line Build-Out Circuit ...................................................................... 25
C
OMMAND
R
EGISTER
CR1 (A
DDRESS
= 0
X
01) ............................................................................................ 25
2.4.2 Disabling the Transmit Line Build-Out Circuit ..................................................................... 26
2.4.3 Design Guideline for Setting the Transmit Line Build-Out Circuit ..................................... 26
C
OMMAND
R
EGISTER
CR1 (A
DDRESS
= 0
X
01) ............................................................................................ 26
2.4.4 The Transmit Line Build-Out Circuit and E3 Applications .................................................. 26
2.5 I
NTERFACING
THE
T
RANSMIT
S
ECTION
OF
THE
XRT73LC00A
TO
THE
L
INE
........................................... 26
Figure 16. Recommended Schematic for Interfacing the Transmit Section of the XRT73LC00A to the Line . 26
T
RANSFORMER
R
ECOMMENDATIONS
............................................................................................... 27
3.0 The Receive Section ................................................................................................. 28
3.1 I
NTERFACING
THE
R
ECEIVE
S
ECTION
OF
THE
XRT73LC00A
TO
THE
L
INE
............................................. 28
Figure 17. Recommended Schematic for Interfacing the Receive Section of the XRT73LC00A to the Line
(Transformer-Coupling) ................................................................................................................. 28
Figure 18. Recommended Schematic for Interfacing the Receive Section of the XRT73LC00A to the Line (Ca-
pacitive-Coupling) ......................................................................................................................... 28
3.2 T
HE
R
ECEIVE
E
QUALIZER
B
LOCK
......................................................................................................... 28
3.2.1 Guidelines for Setting the Receive Equalizer ....................................................................... 29
Figure 19. The Typical Application for the System Installer ........................................................................... 30
3.3 P
EAK
D
ETECTOR
AND
S
LICER
............................................................................................................... 31
3.4 C
LOCK
R
ECOVERY
PLL ....................................................................................................................... 31
C
OMMAND
R
EGISTER
CR2 (A
DDRESS
= 0
X
02) ............................................................................................ 31
3.5 T
HE
HDB3/B3ZS D
ECODER
................................................................................................................ 31
3.5.1 B3ZS Decoding DS3/STS-1 Applications .............................................................................. 31
Figure 20. An Example of B3ZS Decoding ..................................................................................................... 32
3.5.2 HDB3 Decoding E3 Applications ........................................................................................... 32
Figure 21. An Example of HDB3 Decoding ..................................................................................................... 32
3.5.3 Enabling/Disabling the HDB3/B3ZS Decoder ....................................................................... 32
3.6 LOS D
ECLARATION
/C
LEARANCE
.......................................................................................................... 33
C
OMMAND
R
EGISTER
CR2 (A
DDRESS
= 0
X
02) ............................................................................................ 33
3.6.1 The LOS Declaration/Clearance Criteria for E3 Applications ............................................. 33
Figure 22. The Signal Levels that the XRT73LC00A Declares and Clears LOS (E3 Mode Only) .................. 33
Figure 23. The Behavior of the LOS Output Indicator In Response to the Loss of Signal and the Restoration of
Signal ............................................................................................................................................ 34
3.6.2 The LOS Declaration/Clearance Criteria for DS3 and STS-1 Applications ........................ 34
T
ABLE
4: T
HE
ALOS (A
NALOG
LOS) D
ECLARE
AND
C
LEAR
T
HRESHOLDS
FOR
A
GIVEN
SETTING
OF
LOSTHR
AND
REQEN
FOR
DS3
AND
STS-1 A
PPLICATIONS
..................................................................................... 34
C
OMMAND
R
EGISTER
CR0 (A
DDRESS
= 0
X
00) ............................................................................................ 35
C
OMMAND
R
EGISTER
CR2 (A
DDRESS
= 0
X
02) ............................................................................................ 35
3.6.3 Muting the Recovered Data while the LOS is being Declared ............................................ 35
C
OMMAND
R
EGISTER
CR0 (A
DDRESS
= 0
X
00) ............................................................................................ 35
C
OMMAND
R
EGISTER
CR2 (A
DDRESS
= 0
X
02) ............................................................................................ 35
3.7 R
OUTING
THE
R
ECOVERED
T
IMING
AND
D
ATA
I
NFORMATION
TO
THE
R
ECEIVING
T
ERMINAL
E
QUIPMENT
.. 36
C
OMMAND
R
EGISTER
CR3 (A
DDRESS
= 0
X
03) ............................................................................................ 36
Figure 24. The Typical Interface for the Transmission of Data in a Dual-Rail Format From the Receive Section
of the XRT73LC00A to the Receiving Terminal Equipment .......................................................... 36
Figure 25. How the XRT73LC00A Outputs Data on the RPOS and RNEG Output Pins ............................... 37
Figure 26. The Behavior of the RPOS, RNEG and RCLK1 Signals When RCLK1 is Inverted ....................... 37
C
OMMAND
R
EGISTER
CR3 (A
DDRESS
= 0
X
03) ............................................................................................ 37
3.7.1 Routing Single-Rail Format data (Binary Data Stream) to the Receive Terminal Equipment
37
C
OMMAND
R
EGISTER
CR3 (A
DDRESS
= 0
X
03) ............................................................................................ 38
Figure 27. The Typical Interface for the Transmission of Data in a Single-Rail Format From the Receive Section
of the XRT73LC00A to the Receiving Terminal Equipment .......................................................... 38
相關(guān)PDF資料
PDF描述
XRT73LC00AIV E3/DS3/STS-1 LINE INTERFACE UNIT
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT73LC00A_08 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT
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