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XRT72L58
EIGHT CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
PRELIMINARY
REV. P1.1.2
442
Operation of the Receive Payload Data Output In-
terface block
The Receive Payload Data Output Interface permits
the user to read out the payload data of Inbound E3
frames, via either of the following modes.
Serial Mode
Nibble-Parallel Mode
Each of these modes are described in detail, below.
6.3.5.1
Serial Mode Operation Behavior of the
XRT72L58
If the XRT72L58 has been configured to operate in
this mode, then the XRT72L58 will behave as follows.
Payload Data Output
The XRT72L58 will output the payload data, of the in-
coming E3 frames, upon the rising edge of RxClk.
Delineation of Inbound DS3 Frames
The XRT72L58 will pulse the RxFrame output pin
"High" for one bit-period, coincident with it driving the
first bit within a given E3 frame, via the RxSer output
pin.
Interfacing the XRT72L58 to the Receive Terminal
Equipment
Figure 209 presents a simple illustration as how the
user should interface the XRT72L58 to that terminal
equipment which processes Receive Direction pay-
load data.
Required Operation of the Terminal Equipment
The XRT72L58 will update the data on the RxSer out-
put pin, upon the rising edge of RxClk. Hence, the
Terminal Equipment should sample the data on the
RxSer output pin (or the E3_Data_In pin at the Termi-
nal Equipment) upon the rising edge of RxClk. As the
Terminal Equipment samples RxSer with each rising
edge of RxClk it should also be sampling the follow-
ing signals.
RxFrame
RxOHInd
The Need for sampling RxFrame
The XRT72L58 will pulse the RxFrame output pin
"High" coincident with it driving the very first bit of a
given E3 frame onto the RxSer output pin. If knowl-
edge of the E3 Frame Boundaries is important for the
operation of the Terminal Equipment, then this is a
very important signal for it to sample.
The Need for sampling RxOHInd
The XRT72L58 will indicate that it is currently driving
an overhead bit onto the RxSer output pin, by pulsing
the RxOHInd output pin "High". If the Terminal Equip-
ment samples this signal "High", then it should know
that the bit, that it is currently sampling via the RxSer
pin is an overhead bit and should not be processed.
The Behavior of the Signals between the Receive
Payload Data Output Interface block and the Ter-
minal Equipment
The behavior of the signals between the XRT72L58
and the Terminal Equipment for E3 Serial Mode Op-
eration is illustrated in Figure 210.
F
IGURE
209. I
LLUSTRATION
OF
THE
R
ECEIVE
P
AYLOAD
D
ATA
O
UTPUT
I
NTERFACE
B
LOCK
(
OF
THE
XRT72L58
DS3/E3 F
RAMER
IC)
BEING
INTERFACED
TO
THE
R
ECEIVE
T
ERMINAL
E
QUIPMENT
(S
ERIAL
M
ODE
O
PERATION
)
Terminal Equipment
(Receive Payload Section)
XRT72L5x E3 Framer
E3_Data_In
Rx_E3_Clock_In
Rx_Start_of_Frame
RxClk
RxFrame
RxOHInd
34.368 MHz Clock Signal
RxSer
Rx_E3_OH_Ind
RxLineClk
34.368 MHz
Clock Source