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PRELIMINARY
EIGHT CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L58
REV. P1.1.2
210
N
OTE
:
Once the Receive DS3 Framer block has declared
an OOF condition, it will transition back to the F-Bit Search
state within the DS3 Frame Acquisition/Maintenance algo-
rithm (per Figure 81).
In addition to selecting an OOF Declaration criteria
for the F-bits, the user has the following options for
configuring the OOF Declaration criteria based upon
M-bits.
1.
M-bit errors do not cause a OOF Declaration, or
2.
OOF will be declared if 3 out of 4 consecutive M-
bits are in error.
The user will select between these two options by
writing the appropriate value to Bit 0 (M-Sync Algo)
within the Receive DS3 Configuration and Status
Register, as depicted below.
Table 40 relates the contents of this Bit Field to the M-
Bit Error criteria for Declaration of OOF.
The Framing on Parity Criteria for OOF Declara-
tion
Finally, the Framer IC offers the Framing on Parity op-
tion, which also effects the OOF Declaration criteria.
As was mentioned earlier, the Framer IC allows the
user to configure the Receive DS3 Framer block to
detect 'valid-parity' before declaring itself In-Frame.
This same selection also configures the Receive DS3
Framer block to also declare an OOF Condition if a P-
bit error is detected in 2 of the last 5 M-frames.
RX DS3 CONFIGURATION AND STATUS REGISTER, (ADDRESS = 0X10)
Whenever the Receive DS3 Framer block declares
OOF after being in the In-Frame State the following
will happen.
The Receive DS3 Framer will assert the RxOOF
output pin (e.g., toggles it "High").
Bit 4 (RxOOF) within the Rx DS3 Configuration and
Status Register will be set to "1" as depicted below.
Rx DS3 Configuration and Status Register, (Address
= 0x10)
T
ABLE
39: T
HE
R
ELATIONSHIP
BETWEEN
THE
CONTENTS
OF
B
IT
1 (F-S
YNC
A
LGO
)
WITHIN
THE
R
X
DS3
C
ONFIGURATION
AND
S
TATUS
R
EGISTER
,
AND
THE
RESULTING
F-
BIT
OOF D
ECLARATION
CRITERIA
USED
BY
THE
R
ECEIVE
DS3 F
RAMER
BLOCK
F-S
YNC
A
LGO
(B
IT
1)
OOF D
ECLARATION
C
RITERIA
0
OOF is declared when 6 out of 16 consecutive F-bits are in error.
1
OOF is declared when 3 out of 16 consecutive F-bits are in error.
RX DS3 CONFIGURATION AND STATUS REGISTER, (ADDRESS = 0X10)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
RxAIS
RxLOS
RxIdle
RxOOF
Int LOS
Disable
R/W
X
Framing on
Parity
R/W
X
F-Sync Algo
M-Sync Algo
RO
X
RO
X
RO
X
RO
X
R/W
X
R/W
X
T
ABLE
40: T
HE
R
ELATIONSHIP
BETWEEN
THE
CONTENTS
OF
B
IT
0 (M-S
YNC
A
LGO
)
WITHIN
THE
R
X
DS3
C
ONFIGURATION
AND
S
TATUS
R
EGISTER
,
AND
THE
RESULTING
M-B
IT
OOF D
ECLARATION
C
RITERIA
USED
BY
THE
R
ECEIVE
DS3 F
RAMER
BLOCK
MS
YNC
A
LGO
OOF D
ECLARATION
C
RITERIA
0
M-Bit Errors do not result in the declaration of OOF
1
OOF is declared when 3 out of 4 M-bits are in error.
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
RxAIS
RxLOS
RxIdle
RxOOF
Int LOS
Disable
Framing on
Parity
F-Sync Algo
M-Sync Algo