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參數(shù)資料
| 型號(hào)： | XRT7295AT |
| 廠商： | Exar Corporation |
| 英文描述： | DS3/Sonet STS-1 Integrated Line Receiver |
| 中文描述： | DS3/Sonet STS - 1的集成線路接收器 |
| 文件頁(yè)數(shù)： | 7/18頁(yè) |
| 文件大?。?/td> | 1072K |
| 代理商： | XRT7295AT |
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XRT7295AT
7
Rev.1.20
DS3 SIGNAL REQUIREMENTS AT THE DSX
Pulse characteristics are specified at the DSX-3, which is
an interconnection and test point referred to as the
cross-connect (see
Figure 2.
) The cross-connect exists
at the point where the transmitted signal reaches the
distribution
frame
jack.
requirements.
Currently, two isolated pulse template
Table 1
lists
the
signal
requirements exist: the ACCUNET T45 pulse template
(see
Table 2
and
Figure 4
)and the G.703 pulse template
(see
Table 3
and
Figure 5
).
Table 2
and
Table 3
give the
associated boundary equations for the templates. The
XRT7295AT correctly decodes any transmitted signal
that meets one of these templates at the cross-connect.
Parameter
Specification
Line Rate
44.736 Mbps
|
20 ppm
Line Code
Test Load
Bipolar with three-0 substitution (B3ZS)
75
|
5%
An isolated pulse must fit the template in
NO TAG
or
Figure 5
.
1
The pulse amplitude may be scaled by
a constant factor to fit the template. The pulse amplitude must be between 0.36vpk and 0.85vpk,
measured at the center of the pulse.
Pulse Shape
Power Levels
For and all 1s transmitted pattern, the power at 22.368
±
0.002MHz must be -1.8 to +5.7dBm, and
the power at 44.736
±
0.002MHz must be -21.8dBm to -14.3dBm.
2, 3
Notes
1
The pulse template proposed by G.703 standards is shown in Figure 5 and specified in Table 3. The proposed G.703 standards
furtherstatethatthevoltageinatimeslotcontaininga0mustnotexceed
±
5%of thepeakpulseamplitude,exceptfortheresidue
of preceding pulses.
2
The power levels specified by the proposed G.703 standardsare identical exceptthat the power isto be measured in 3kHzbands.
3
The all 1s pattern must be a pure all 1s signal, without framing or other control bits.
Table 1. DSX-3 Interconnection Specification
Lower Curve
Upper Curve
Time
Equation
0
Time
Equation
0
T
±
-0.36
T
±
-0.68
-0.36
±
T
±
+0.28
0.5 (1+sin
{π
/2}
[
1+T/0.18
])
-0.68
±
T
±
+0.36
0.5 (1+sin
{π
/2}
[
1+T/0.34
]
)
0.28
±
T
0.11e
-3.42(T-0.3)
0.36
±
T
0.05 + 0.407e
-1.84(T-0.36)
Table 2. DSX-3 Pulse Template Boundaries for ACCUNET T45 Standards (See
Figure 4.
)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT7295ATIW | DS3/Sonet STS-1 Integrated Line Receiver |
| XRT7295 | () |
| XRT7296 | INTEGRATED LINE TRANSMITTER |
| XRT7296IP | INTEGRATED LINE TRANSMITTER |
| XRT7296IW | INTEGRATED LINE TRANSMITTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT7295AT_10 | 制造商:EXAR 制造商全稱:EXAR 功能描述:DS3 SONET STS1 Integrated Line Receiver |
| XRT7295ATIW | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7295ATIW-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI -.5V--6.5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7295ATIW-F | 制造商:Exar Corporation 功能描述:T3/E3 LIU IC |
| XRT7295ATIWTR | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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