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參數(shù)資料
| 型號： | XRP7714ILB-0X14-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 26/29頁 |
| 文件大小： | 1009K |
| 描述： | IC REG 5OUT BCK/LINEAR 40TQFN |
| 標(biāo)準(zhǔn)包裝： | 490 |
| 系列： | PowerXR |
| 拓?fù)洌?/td> | 降壓（降壓）同步（4），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 5 |
| 頻率 - 開關(guān)： | 1.5MHz |
| 電壓/電流 - 輸出 1： | 控制器 |
| 電壓/電流 - 輸出 2： | 控制器 |
| 電壓/電流 - 輸出 3： | 控制器 |
| 帶 LED 驅(qū)動器： | 無 |
| 帶監(jiān)控器： | 無 |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 4.75 V ~ 25 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-TQFN（6x6） |
| 包裝： | 托盤 |
| 其它名稱： | 1016-1700 |
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?2011 Exar Corporation
26/29
Rev. 1.1.6
Select ESR such that output voltage ripple (Vrip) specification is met. There are two components in
Vrip. First component arises from the charge transferred to and from Cout during each cycle. The
second component of Vrip is due to the inductor ripple current flowing through the output
capacitors ESR. It can be calculated for Vrip:
55_5V5] = 5<5_5V5] ?/DIV>
?/DIV>
55F5E
2
+ ?/DIV>
1
8 ?565\5b5a ?5S5`
?/DIV>
2
Where:
Irip is the inductor ripple current
fs is the switching frequency
Cout is the output capacitance
Note that a smaller inductor results in a higher Irip, therefore requiring a larger Cout and/or lower
ESR in order to meet Vrip. With the current generation of ultra-low ESR ceramic capacitors it is
common to operate with Irip e 30% of Iout.
When trying to optimize control loop bandwidth, particularly at switching frequencies below
600kHz, an effective ESR in the range of 7 to 20mohm can help significantly. The Digital Power
Studio design tool is used to verify what will work best in your application.
" Input Capacitor Selection
Select the input capacitor for Voltage, Capacitance, ripple current, ESR and ESL. Voltage rating is
nominally selected to be at least twice the input voltage. The RMS value of input capacitor current,
assuming a low inductor ripple current, can be approximated as:
55V5[ = 5<5\5b5a ??7 ?/DIV>
(
1 57
)
Where:
Iin is the RMS input current
Iout is the DC output current
D is the duty cycle
In general, the total input voltage ripple should be kept below 1.5% of VIN. The input voltage
ripple also has two major components: the voltage drop on the main capacitor
Cin
V and the
voltage drop due to ESR -
ESR
V
. The contribution to Input voltage ripple by each term can be
calculated from:
2
)
(
out
in
out
out
Cin
V
C
f
V
V
V
I
V
=
)
5
.
0
(
rip
out
ESR
I
I
ESR
V
+
?/DIV>
=
Total input voltage ripple is the sum of the above:
ESR
Cin
Tot
V
V
V
+
=
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