參數(shù)資料
型號(hào): XRP7714ILB-0X14-F
廠商: Exar Corporation
文件頁(yè)數(shù): 18/29頁(yè)
文件大?。?/td> 1009K
描述: IC REG 5OUT BCK/LINEAR 40TQFN
標(biāo)準(zhǔn)包裝: 490
系列: PowerXR
拓?fù)洌?/td> 降壓(降壓)同步(4),線性(LDO)(1)
功能: 任何功能
輸出數(shù): 5
頻率 - 開(kāi)關(guān): 1.5MHz
電壓/電流 - 輸出 1: 控制器
電壓/電流 - 輸出 2: 控制器
電壓/電流 - 輸出 3: 控制器
帶 LED 驅(qū)動(dòng)器: 無(wú)
帶監(jiān)控器: 無(wú)
帶序列發(fā)生器:
電源電壓: 4.75 V ~ 25 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 40-TQFN(6x6)
包裝: 托盤(pán)
其它名稱: 1016-1700
X
X
R
R
P
P
7
7
7
7
1
1
4
4
 
 
Q
Q
u
u
a
a
d
d
 
 
C
C
h
h
a
a
n
n
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n
e
e
l
l
 
 
D
D
i
i
g
g
i
i
t
t
a
a
l
l
 
 
P
P
W
W
M
M
 
 
S
S
t
t
e
e
p
p
 
 
D
D
o
o
w
w
n
n
 
 
C
C
o
o
n
n
t
t
r
r
o
o
l
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e
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r
r
 
 
 
?2011 Exar Corporation
18/29
Rev. 1.1.6
Over-Current Fault Handling
When an over-current condition occurs, PWM drivers in the corresponding channels are disabled.
After a 200ms timeout, the controller is re-powered and soft-start is initiated. When the over-
current condition is reached the controller will check the SET_FAULT_RESP_CONFIG_LB and
SET_FAULT_RESP_CONFIG_HB to determine whether there are any following channels that need
to be similarly restarted. The controller will also set the fault flags in READ_OVC_FAULT_WARN
register.
Typically the over-current fault threshold would be set to 130-140% of the maximum desirable
output current. This will help avoid any over-current conditions caused by transients that would
shut down the output channel.
CHIP OPERATION AND CONFIGURATION
SOFT-START
The SET_SS_RISE_CHx register is a 16 bit register which specifies the soft-start delay and the
ramp characteristics for a specific channel. This register allows the customer to program the
channel with a 250祍 step resolution and up to a maximum 16ms delay.
Bits [15:10] specify the delay after enabling a channel but before outputting pulses; where each bit
represents 250祍 steps. Bits [9:0] specify the rise time of the channel; these 10 bits define the
number of microseconds for each 50mV increment to reach the target voltage.
 
Enable
Signal
Vout
SS_RISE_CHx
REGISTER
Bit [0:9]
RISE TIME
DELAY
Bit [10:15]
 
Fig. 24: Channel Power Up Sequence
 
 
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