Unless otherwise noted: TA" />
參數(shù)資料
型號(hào): XR19L220IL40-0B-EB
廠商: Exar Corporation
文件頁(yè)數(shù): 27/43頁(yè)
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR19L202 40QFN
標(biāo)準(zhǔn)包裝: 1
系列: *
XR19L220
33
REV. 1.0.2
SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER
AC ELECTRICAL CHARACTERISTICS
Unless otherwise noted: TA=0o to 70oC (-40o to +85oC for industrial grade package), Vcc=3.0 - 5.5V, 50 pF
load where applicable
SYMBOL
PARAMETER
LIMITS
3.3
MIN
MAX
LIMITS
5.0
MIN
MAX
UNIT
-
Crystal Frequency
20
24
MHz
OSC
External Clock Frequency
33
50
MHz
CLK
External Clock Low/High Time
15
10
ns
TAS
Address Setup Time (16 Mode)
5
10
ns
TAH
Address Hold Time (16 Mode)
0
ns
TCS
Chip Select Width (16 Mode)
50
30
ns
TRD
IOR# Strobe Width (16 Mode)
50
30
ns
TDY
Read Cycle Delay (16 Mode)
50
30
ns
TRDV
Data Access Time (16 Mode)
50
25
ns
TDD
Data Disable Time (16 Mode)
0
20
0
20
ns
TWR
IOW# Strobe Width (16 Mode)
50
30
ns
TDY
Write Cycle Delay (16 Mode)
50
30
ns
TDS
Data Setup Time (16 Mode)
15
12
ns
TDH
Data Hold Time (16 Mode)
3
5
ns
TADS
Address Setup (68 Mode)
5
10
ns
TADH
Address Hold (68 Mode)
0
ns
TRWS
R/W# Setup to CS# (68 Mode)
10
ns
TRDA
Read Data Access (68 mode)
50
25
ns
TRDH
Read Data Disable Time (68 mode)
20
ns
TWDS
Write Data Setup (68 mode)
15
12
ns
TWDH
Write Data Hold (68 Mode)
3
5
ns
TRWH
CS# De-asserted to R/W# De-asserted (68 Mode)
10
ns
TCSL
CS# Width (68 Mode)
50
30
ns
TCSD
CS# Cycle Delay (68 Mode)
50
30
ns
TWDO
Delay From IOW# To Output
75
50
ns
TMOD
Delay To Set Interrupt From MODEM Input
75
50
ns
TRSI
Delay To Reset Interrupt From IOR#
75
50
ns
TSSI
Delay From Stop To Set Interrupt
1
Bclk
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