參數(shù)資料
型號： XR19L200IL32-0A-EB
廠商： Exar Corporation
文件頁數(shù)： 16/40頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR19L200 32QFN
標準包裝： 1
系列： *
XR19L200
23
REV. 1.0.2
SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER
MCR[1]: RTS# Output
The RTS# output is not available as an output on this device. But for 16C550 compatibility, it can still be used
in internal loopback mode.
Logic 0 = Force RTS output HIGH (default).
Logic 1 = Force RTS output LOW.
MCR[2]: OP1# (legacy term)
The OP1# output is not available on the XR19L200, however, it is available in internal loopback. In the Internal
Loopback Mode, this bit controls the state of the modem input RI bit in the MSR register as shown in Figure 9.
Logic 0 = OP1# is HIGH (default).
Logic 1 = OP1# is LOW.
In the Internal Loopback Mode, this bit controls the state of the modem input RI bit in the MSR register as
shown in Figure 9.
MCR[3]: INT Output Enable or OP2# (legacy term)
This bit enables and disables the operation of interrupt output, INT in the Intel mode. If INT output is not used,
OP2# can be used as a general purpose output in the Intel mode. In the Motorola mode, this bit must be set to
logic 0.
Logic 0 = INT output disabled (three state mode) in Intel mode (default).
Logic 1 = INT output enabled (active mode) in Intel mode.
In the Internal Loopback Mode, this bit functions like the OP2# in the 16C550 and is used to set the state of the
modem input CD bit in the MSR register.
MCR[4]: Internal Loopback Enable
Logic 0 = Disable loopback mode (default).
Logic 1 = Enable local loopback mode, see loopback section and Figure 9.
MCR[5]: Xon-Any Enable
Logic 0 = Disable Xon-Any function (for 16C550 compatibility, default).
Logic 1 = Enable Xon-Any function. In this mode, any RX character received will resume transmit operation.
The RX character will be loaded into the RX FIFO, unless the RX character is an Xon or Xoff character and
the L200 is programmed to use the Xon/Xoff flow control.
MCR[6]: Reserved
For proper functionality, this bit should be set to a logic 0.
MCR[7]: BRG Clock Prescaler Select
Logic 0 = Divide by one. The input clock from the crystal or external clock is fed directly to the Programmable
Baud Rate Generator without further modification, i.e., divide by one (default).
Logic 1 = Divide by four. The prescaler divides the input clock from the crystal or external clock by four and
feeds it to the Programmable Baud Rate Generator, hence, data rates get reduced 4 times.
4.9
Line Status Register (LSR) - Read Only
This register provides the status of data transfers between the UART and the host.
LSR[0]: Receive Data Ready Indicator
Logic 0 = No data in receive holding register or FIFO (default).
Logic 1 = Data has been received and is saved in the receive holding register or FIFO.
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相關代理商/技術參數(shù)
參數(shù)描述
XR19L200IL32-0B-EB 功能描述:界面開發(fā)工具 Supports L200 32 pin QFN, PCI Interface RoHS:否 制造商:Bourns 產品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
XR19L200IL32-F 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR19L202 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER
XR19L202IL48 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER
XR19L202IL48-0B-EB 功能描述:界面開發(fā)工具 Supports L202 48 pin QFN,PCI Interface RoHS:否 制造商:Bourns 產品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
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