REV. 1.0.3 2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO CSB# (A3) 9 11 20 33 I When 16/68# pin is HIGH, this input is chip select " />
參數資料
型號: XR16V554IV80-0A-EB
廠商: Exar Corporation
文件頁數: 39/43頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR16V554 80LQFP
標準包裝: 1
系列: *
XR16V554/554D
5
REV. 1.0.3
2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO
CSB#
(A3)
9
11
20
33
I
When 16/68# pin is HIGH, this input is chip select B
(active low) to enable channel B in the device.
When 16/68# pin is LOW, this input becomes address
line A3 which is used for channel selection in the Motor-
ola bus interface.
CSC#
(A4)
27
38
50
68
I
When 16/68# pin is HIGH, this input is chip select C
(active low) to enable channel C in the device.
When 16/68# pin is LOW, this input becomes address
line A4 which is used for channel selection in the Motor-
ola bus interface.
CSD#
(VCC)
31
42
54
73
I
When 16/68# pin is HIGH, this input is chip select D
(active low) to enable channel D in the device.
When 16/68# pin is LOW, this input is not used and
should be connected VCC.
INTA
(IRQ#)
4
6
15
27
O
(OD)
When 16/68# pin is HIGH for Intel bus interface, this
ouput becomes channel A interrupt output. The output
state is defined by the user and through the software
setting of MCR[3]. INTA is set to the active mode when
MCR[3] is set to a logic 1. INTA is set to the three state
mode when MCR[3] is set to a logic 0 (default). See
MCR[3].
When 16/68# pin is LOW for Motorola bus interface,
this output becomes device interrupt output (active low,
open drain). An external pull-up resistor is required for
proper operation.
INTB
INTC
INTD
(N.C.)
10
26
32
12
37
43
21
49
55
34
67
74
O
When 16/68# pin is HIGH for Intel bus interface, these
ouputs become the interrupt outputs for channels B, C,
and D. The output state is defined by the user through
the software setting of MCR[3]. The interrupt outputs
are set to the active mode when MCR[3] is set to a logic
1 and are set to the three state mode when MCR[3] is
set to a logic 0 (default). See MCR[3].
When 16/68# pin is LOW for Motorola bus interface,
these outputs are unused and will stay at logic zero
level. Leave these outputs unconnected.
TXRDY#
-
39
55
O
Transmitter Ready (active low). This output is a logi-
cally ANDed status of TXRDY# A-D. See Table 5. If this
output is unused, leave it unconnected.
RXRDY#
-
38
54
O
Receiver Ready (active low). This output is a logically
ANDed status of RXRDY# A-D. See Table 5. If this out-
put is unused, leave it unconnected.
Pin Description
NAME
48-QFN
PIN #
64-LQFP
PIN #
68-PLCC
PIN#
80-LQFP
PIN #
TYPE
DESCRIPTION
相關PDF資料
PDF描述
1-6374614-0 C/A 2.0MM 62.5/125 LC-SC 10M
GBC22DRTN-S734 CONN EDGECARD 44POS DIP .100 SLD
UPM1J820MPD6TD CAP ALUM 82UF 63V 20% RADIAL
RPP30-2424SW-1 CONV DC/DC 30W 9-36VIN 24VOUT
XR16V554IV-0A-EVB EVAL BOARD FOR XR16V554 64LQFP
相關代理商/技術參數
參數描述
XR16V554IV80-F 功能描述:UART 接口集成電路 2.25V-3.6V 16B FIFO temp -45 to 85C;UART RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16V554IV80TR-F 功能描述:UART 接口集成電路 XR16V554IV80TR-F RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16V554IV-F 功能描述:通用總線函數 UART RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數量:1 開啟電阻(最大值): 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XR16V554IVTR-F 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16V564 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO