REV. 1.0.3 MSR[4]: CTS Input Status A HIGH on the CTS# pin will stop UART transmitte" />
參數(shù)資料
型號(hào): XR16V554IV80-0A-EB
廠商: Exar Corporation
文件頁(yè)數(shù): 21/43頁(yè)
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR16V554 80LQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
XR16V554/554D
28
2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO
REV. 1.0.3
MSR[4]: CTS Input Status
A HIGH on the CTS# pin will stop UART transmitter as soon as the current character has finished
transmission, and a LOW will resume data transmission. Normally MSR bit-4 bit is the compliment of the CTS#
input. However in the loopback mode, this bit is equivalent to the RTS# bit in the MCR register. The CTS# input
may be used as a general purpose input when the modem interface is not used.
MSR[5]: DSR Input Status
Normally this bit is the complement of the DSR# input. In the loopback mode, this bit is equivalent to the DTR#
bit in the MCR register. The DSR# input may be used as a general purpose input when the modem interface is
not used.
MSR[6]: RI Input Status
Normally this bit is the complement of the RI# input. In the loopback mode this bit is equivalent to bit-2 in the
MCR register. The RI# input may be used as a general purpose input when the modem interface is not used.
MSR[7]: CD Input Status
Normally this bit is the complement of the CD# input. In the loopback mode this bit is equivalent to bit-3 in the
MCR register. The CD# input may be used as a general purpose input when the modem interface is not used.
4.10
Scratch Pad Register (SPR) - Read/Write
This is a 8-bit general purpose register for the user to store temporary data.
4.11
Baud Rate Generator Registers (DLL and DLM) - Read/Write
These registers make-up the value of the baud rate divisor. The concatenation of the contents of DLM and DLL
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XR16V554IV-0A-EVB EVAL BOARD FOR XR16V554 64LQFP
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