REV. 1.0.2 TSI Delay" />
參數(shù)資料
型號(hào): XR16V2651IM-0B-EB
廠商: Exar Corporation
文件頁數(shù): 35/51頁
文件大小: 0K
描述: EVAL BOARD FOR V2651 48TQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
XR16V2651
40
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO AND POWERSAVE FEATURE
REV. 1.0.2
TSI
Delay From Stop To Interrupt
45
ns
TINT
Delay From Initial INT Reset To Transmit Start
8
24
8
24
Bclk
TWRI
Delay From IOW# To Reset Interrupt
45
ns
TSSR
Delay From Stop To Set RXRDY#
1
Bclk
TRR
Delay From IOR# To Reset RXRDY#
45
ns
TWT
Delay From IOW# To Set TXRDY#
45
ns
TSRT
Delay From Center of Start To Reset TXRDY#
8
Bclk
TRST
Reset Pulse Width
40
ns
Bclk
Baud Clock
16X or 8X or 4X of data rate
Hz
FIGURE 13. CLOCK TIMING
AC ELECTRICAL CHARACTERISTICS
UNLESS OTHERWISE NOTED: TA = -40O TO +85OC, VCC=2.25 - 3.63V, 70 PF LOAD WHERE APPLICABLE
SYMBOL
PARAMETER
LIMITS
2.5V ± 10%
MIN
MAX
LIMITS
3.3V ± 10%
MIN
MAX
UNIT
External
Clock
T
ECH
T
ECL
VIH
VIL
T
ECLK
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