- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16523 > XR16V2651IM-0B-EB (Exar Corporation)EVAL BOARD FOR V2651 48TQFP PDF資料下載
參數(shù)資料
| 型號： | XR16V2651IM-0B-EB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 14/51頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR V2651 48TQFP |
| 標準包裝： | 1 |
| 系列： | * |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁
XR16V2651
21
REV. 1.0.2
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO AND POWERSAVE FEATURE
2.18
Sleep Mode with Wake-Up Indicator and PowerSave Feature
The V2651 supports low voltage system designs, hence, a sleep mode with auto wake-up and PowerSave
feature is included to reduce power consumption when the device is not actively used.
2.18.1
Sleep Mode
All of these conditions must be satisfied for the V2651 to enter sleep mode:
■ no interrupts pending for both channels of the V2651 (ISR bit-0 = 1)
■ sleep mode of both channels are enabled (IER bit-4 = 1)
■ modem inputs are not toggling (MSR bits 0-3 = 0)
■ RX input pins are idling HIGH
The V2651 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for
no clock output as an indication that the device has entered the sleep mode.
The V2651 resumes normal operation by any of the following when PowerSave mode is disabled:
■ a receive data start bit transition (HIGH to LOW)
■ a data byte is loaded to the transmitter, THR or FIFO
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
If the sleep mode is enabled and the V2651 is awakened by one of the conditions described above, an
interrupt is issued by the V2651 to signal to the CPU that it is awake. The lower nibble of the interrupt source
register (ISR) will read a value of 0x1 for this interrupt and reading the ISR clears this interrupt. Since the same
value (0x1) is also used to indicate no pending interrupt, users should exercise caution while using the sleep
mode. The V2651 will return to the sleep mode automatically after all interrupting conditions have been
serviced and cleared. If the V2651 is awakened by the modem inputs, a read to the MSR is required to reset
the modem inputs. In any case, the sleep mode will not be entered while an interrupt is pending from channel
A or B. The V2651 will stay in the sleep mode of operation until it is disabled by setting IER bit-4 to a logic 0.
A word of caution: owing to the starting up delay of the crystal oscillator after waking up from sleep mode, the
first few receive characters may be lost. The number of characters lost during the restart also depends on your
operating data rate. More characters are lost when operating at higher data rate. Also, it is important to keep
RX A/B inputs idling HIGH or “marking” condition during sleep mode to avoid receiving a “break” condition
upon the restart. This may occur when the external interface transceivers (RS-232, RS-422 or another type)
are also put to sleep mode and cannot maintain the “marking” condition. To avoid this, the designer can use a
47k-100k ohm pull-up resistor on the RXA and RXB pins.
2.18.2
PowerSave Feature
If the address lines, data bus lines, IOW#, IOR#, CSA#, CSB#, and modem input lines remain steady when the
V2651 is in sleep mode, the maximum current will be in the microamp range as specified in the DC Electrical
Characteristics on page 38. If the input lines are floating or are toggling while the V2651 is in sleep mode, the
current can be up to 100 times more. If not using the PowerSave feature, then an external buffer would be
required to keep the address and data bus lines from toggling or floating to achieve the low current. But if the
PowerSave feature is enabled (pin 12 connected to VCC), this will eliminate the need for an external buffer by
internally isolating the address, data and control signals (see Figure 1 on page 1) from other bus activities that
could cause wasteful power drain. The V2651 enters PowerSave mode when the PwrSave pin is connected to
VCC and the V2651 is in sleep mode (see Sleep Mode section above).
Since PowerSave mode isolates the address, data and control signals, the device will wake-up by:
■ a receive data start bit transition (HIGH to LOW)
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
The V2651 will return to the PowerSave mode automatically after a read to the MSR (to reset the modem
inputs) and all interrupting conditions have been serviced and cleared. The V2651 will stay in the PowerSave
mode of operation until it is disabled by setting IER bit-4 to a logic 0 and/or the PwrSave pin is connected to
GND.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-JVN-EZ-S | CONVERTER MOD DC/DC 18.5V 25W |
| EEM28DTMN-S189 | CONN EDGECARD 56POS R/A .156 SLD |
| GSM11DRTH-S13 | CONN EDGECARD 22POS .156 EXTEND |
| A3DDH-1636G | IDC CABLE - AKR16H/AE16G/AKR16H |
| VE-JVK-EZ-S | CONVERTER MOD DC/DC 40V 25W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16V2651IM-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16V2651IMTR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 32Byte FIFO 2.5V/3.3V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR16V2651IMTR-F |
| XR16V2652 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 32-BYTE FIFO |
| XR16V2652_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 32-BYTE FIFO |
| XR16V2652IJ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。