參數(shù)資料
型號： XR16M2752IJ-0B-EB
廠商： Exar Corporation
文件頁數(shù)： 1/51頁
文件大小： 0K
描述： EVAL BOARD FOR M2752-B 44PLCC
標(biāo)準(zhǔn)包裝： 1
系列： *
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XR16M2752
1.62V TO 3.63V HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
AUGUST 2007
REV. 1.0.0
GENERAL DESCRIPTION
The XR16M27521 (M2752) is a high performance
dual universal asynchronous receiver and transmitter
(UART) with 64 byte TX and RX FIFOs. The device
operates from 1.62 to 3.63 volts and is pin-to-pin
compatible
to
Exar’s
ST16C2552,
XR16L2552,
XR16L2752 and XR16V2752. The M2752 register set
is identical to the XR16V2752 and is compatible to
the ST16C2552 and the XR16C2852 enhanced
features. It supports the Exar’s enhanced features of
programmable FIFO trigger level and FIFO level
counters,
automatic
hardware
(RTS/CTS)
and
software flow control, automatic RS-485 half duplex
direction control output and a complete modem
interface. Onboard registers provide the user with
operational status and data error flags. An internal
loopback
capability
allows
system
diagnostics.
Independent programmable baud rate generators are
provided in each channel to select data rates up to 8
Mbps at 3.3 Volt and 8X sampling clock. The M2752
is available in 44-pin PLCC and 32-pin QFN
packages.
NOTE: 1 Covered by U.S. Patent #5,649,122
APPLICATIONS
Portable Appliances
Telecommunication Network Routers
Ethernet Network Routers
Cellular Data Devices
Factory Automation and Process Controls
FEATURES
1.62 to 3.63 Volt Operation
Pin-to-pin compatible to Exar’s XR16L2752
Two independent UART channels
■ Data rate of up to 8 Mbps at 3.3 V
■ Data rate of up to 6.25 Mbps at 2.5 V
■ Data rate of up to 4 Mbps at 1.8 V
■ Fractional Baud Rate Generator
■ Transmit and Receive FIFOs of 64 bytes
■ Programmable TX and RX FIFO Trigger Levels
■ Transmit and Receive FIFO Level Counters
■ Automatic Hardware (RTS/CTS) Flow Control
■ Selectable Auto RTS Flow Control Hysteresis
■ Automatic Software (Xon/Xoff) Flow Control
■ Automatic
RS-485
Half-duplex
Direction
Control Output via RTS#
■ Wireless Infrared (IrDA 1.0) Encoder/Decoder
■ Automatic sleep mode
■ Full modem interface
Alternate Function Register
Device Identification and Revision
Crystal oscillator or external clock input
Crystal oscillator (up to 24MHz) or external clock
(up to 64MHz) input
44-PLCC and 32-QFN packages
FIGURE 1. XR16M2752 BLOCK DIAGRAM
MFA#
(OP2A#,
BAUDOUTA#, or
RXRDYA#)
MFB#
(OP2B#,
BAUDOUTB#, or
RXRDYB#)
XTAL1
XTAL2
Crystal Osc/Buffer
TXA (or TXIRA)
8-bit Data
Bus
Interface
UART Channel A
64 Byte TX FIFO
64 Byte RX FIFO
BRG
IR
ENDEC
TX & RX
UART
Regs
1.62 V to 3.6 V VCC
GND
UART Channel B
(same as Channel A)
A2:A0
D7:D0
CS#
CHSEL
INTA
INTB
IOW#
IOR#
Reset
TXRDYA#
TXRDYB#
CTS#A/B, RI#A/B,
CD#A/B, DSR#A/B
RXA (or RXIRA)
Modem Control Logic
DTR#A/B, RTS#A/B
TXB (or TXIRB)
RXB (or RXIRB)
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