XR-T7288
14
Rev. 1.01
Digital Logic
The logic provides alarms, optional HDB3 coding, blue
signal (AIS) insertion circuits, and maintenance
loopbacks. It also optionally performs dual-rail to
single-rail conversion of the data and provides an
alternate logic polarity (logic mode 2) in dual-rail mode for
receive clock and receive and transmit data.
Single-Rail/Dual-Rail Interface and Alternate Logic
Mode
The XR-T7288 device supports either single-rail or
dual-rail operation by setting the control pin SR/DR. In
the single-rail mode (SR/DR = 0), the XR-T7288 receiver
converts bipolar input signals (T1, R1) to a unipolar output
signal on RDATA. The XR-T7288 transmitter converts a
unipolar input signal on TDATA to a balanced bipolar data
signal on pins T2 and R2. If desired, the HDB3 control pin
can be used to set HDB3 encoding/decoding. Violation
information is available on output pin VIO.
In the dual-rail mode (SR/DR = 1), the XR-T7288 receiver
converts bipolar input signals (T1, R1) to p-rail and n-rail,
nonreturn-to-zero output data on pins RPDATA and
RNDATA, respectively. The XR-T7288 transmitter
converts non-return-to-zero p-rail and n-rail input data on
pins TPDATA and TNDATA, respectively, to a balanced
bipolar data signal on pins T2 and R2. In the dual-rail
mode, HDB3 encoding/decoding and bipolar violation
output functions are unavailable.
In the dual-rail mode, an alternate-logic polarity mode is
available via control pin FLM. If FLM = 1, the XR-T7288
device operates in logic mode 2; RClk is inverted with
respect to logic mode 1, and input and output data
(TPDATA, TNDATA, RPDATA, and RNDATA) are
active-low (see Figures 10-13).
Internal pull-downs on signals SR/DR and FLM set
default operation to single-rail, logic mode 1 (see Table 3)
FLM
0
1
0
1
1
SR/DR
0
1
1
0
1
Single-/Dual-Rail
Single
Dual
X
2
Dual
Logic Mode
1
1
X
2
2
Notes:
1
Default operation (identical with LC1135B) if both pins are unconnected.
2
X = illegal option
Table 3. Rail Interface and Logic Mode Options
Pin
3
4
6
8
Name
Function
HDB3 Enable
VIO Violation
RDATA Receive Data
TDATA Transmit Data
HDB3/TNDAT
VIO/RNDATA
RDATA/RPDATA
TDATA/TPDATA
Table 4. Single-Rail Operation (Default State) SR/DR = 0 (or left unconnected internal pull-down circuitry).
Pin
3
4
6
8
Name
Function
HDB3/TNDATA
VIO/RNDATA
RDATA/RPDATA
TDATA/TPDATA
N-rail Transmit Input Data
N-rail Receive Output Data
P-rail Receive Output Data
P-rail Transmit Input Data
Table 5. Dual-Rail Operation SR/DR = 1