參數(shù)資料
型號(hào): XC3S1200E-4FG400I
廠商: Xilinx Inc
文件頁(yè)數(shù): 191/227頁(yè)
文件大?。?/td> 0K
描述: IC FPGA SPARTAN 3E 400FBGA
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-3E
LAB/CLB數(shù): 2168
邏輯元件/單元數(shù): 19512
RAM 位總計(jì): 516096
輸入/輸出數(shù): 304
門(mén)數(shù): 1200000
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 400-BGA
供應(yīng)商設(shè)備封裝: 400-FBGA(21x21)
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Spartan-3E FPGA Family: Functional Description
DS312 (v4.1) July 19, 2013
Product Specification
66
Configuration
For additional information on configuration, refer to UG332:
Spartan-3 Generation Configuration User Guide.
Differences from Spartan-3 FPGAs
In general, Spartan-3E FPGA configuration modes are a
superset to those available in Spartan-3 FPGAs. Two new
modes added in Spartan-3E FPGAs provide a glueless
configuration interface to industry-standard parallel NOR
Flash and SPI serial Flash memories.
Configuration Process
The function of a Spartan-3E FPGA is defined by loading
application-specific configuration data into the FPGA’s
internal, reprogrammable CMOS configuration latches
(CCLs), similar to the way a microprocessor’s function is
defined by its application program. For FPGAs, this
configuration process uses a subset of the device pins,
some of which are dedicated to configuration; other pins are
merely borrowed and returned to the application as
general-purpose user I/Os after configuration completes.
Spartan-3E FPGAs offer several configuration options to
minimize the impact of configuration on the overall system
design. In some configuration modes, the FPGA generates
a clock and loads itself from an external memory source,
either serially or via a byte-wide data path. Alternatively, an
external host such as a microprocessor downloads the
FPGA’s configuration data using a simple synchronous
serial interface or via a byte-wide peripheral-style interface.
Furthermore, multiple-FPGA designs share a single
configuration memory source, creating a structure called a
daisy chain.
Three FPGA pins—M2, M1, and M0—select the desired
configuration mode. The mode pin settings appear in
Table 44. The mode pin values are sampled during the start
of configuration when the FPGA’s INIT_B output goes High.
After the FPGA completes configuration, the mode pins are
available as user I/Os.
Table 44: Spartan-3E Configuration Mode Options and Pin Settings
Master
Serial
SPI
BPI
Slave Parallel
Slave Serial
JTAG
M[2:0] mode pin
settings
<0:0:0>
<0:0:1>
<0:1:0>=Up
<0:1:1>=Down
<1:1:0>
<1:1:1>
<1:0:1>
Data width
Serial
Byte-wide
Serial
Configuration memory
source
Xilinx
Industry-standard
SPI serial Flash
Industry-standard
parallel NOR
Flash or Xilinx
parallel Platform
Any source via
microcontroller,
CPU, Xilinx
parallel Platform
Flash, etc.
Any source via
microcontroller,
CPU, Xilinx
etc.
Any source via
microcontroller,
CPU, System
Clock source
Internal
oscillator
Internal oscillator
External clock
on CCLK pin
External clock
on CCLK pin
External clock
on TCK pin
Total I/O pins borrowed
during configuration
8
13
46
21
8
0
Configuration mode for
downstream daisy-
chained FPGAs
Slave Serial
Slave Parallel
Slave Parallel or
Memory
Mapped
Slave Serial
JTAG
Stand-alone FPGA
applications (no
external download
host)
Possible using
XCFxxP
Platform Flash,
which optionally
generates CCLK
Possible using
XCFxxP
Platform Flash,
which optionally
generates CCLK
Uses low-cost,
industry-standard
Flash
Supports optional
MultiBoot,
multi-configuration
mode
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC3S1200E-4FG484C 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3E FPGA Family
XC3S1200E-4FG484I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3E FPGA Family
XC3S1200E-4FGG320C 功能描述:IC SPARTAN-3E FPGA 1200K 320FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門(mén)陣列) 系列:Spartan®-3E 標(biāo)準(zhǔn)包裝:60 系列:XP LAB/CLB數(shù):- 邏輯元件/單元數(shù):10000 RAM 位總計(jì):221184 輸入/輸出數(shù):244 門(mén)數(shù):- 電源電壓:1.71 V ~ 3.465 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:388-BBGA 供應(yīng)商設(shè)備封裝:388-FPBGA(23x23) 其它名稱:220-1241
XC3S1200E-4FGG320I 功能描述:IC FPGA SPARTAN-3E 1200K 320FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門(mén)陣列) 系列:Spartan®-3E 標(biāo)準(zhǔn)包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計(jì):2138112 輸入/輸出數(shù):358 門(mén)數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA(27x27)
XC3S1200E-4FGG400C 功能描述:IC SPARTAN-3E FPGA 1200K 400FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門(mén)陣列) 系列:Spartan®-3E 標(biāo)準(zhǔn)包裝:60 系列:XP LAB/CLB數(shù):- 邏輯元件/單元數(shù):10000 RAM 位總計(jì):221184 輸入/輸出數(shù):244 門(mén)數(shù):- 電源電壓:1.71 V ~ 3.465 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:388-BBGA 供應(yīng)商設(shè)備封裝:388-FPBGA(23x23) 其它名稱:220-1241