參數(shù)資料
型號: XC2S200E-6PQ208C
廠商: Xilinx Inc
文件頁數(shù): 103/108頁
文件大?。?/td> 0K
描述: IC FPGA 1.8V 1176 CLB'S 208-PQFP
標準包裝: 24
系列: Spartan®-IIE
LAB/CLB數(shù): 1176
邏輯元件/單元數(shù): 5292
RAM 位總計: 57344
輸入/輸出數(shù): 146
門數(shù): 200000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 208-BFQFP
供應商設備封裝: 208-PQFP(28x28)
其它名稱: 122-1209
94
DS077-4 (v3.0) August 9, 2013
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
I/O
5
AC5
-
I/O
I/O, L152N
5
AE4
-
I/O
I/O, L152N
I/O, L152P
5
AF4
-
I/O, L152P
I/O, L151N
5
AE5
-
I/O, L151N
I/O, L151P
5
AF5
-
I/O
I/O, L151P
I/O, L150N
5
AA6
XC2S400E
-
I/O, L150N_Y
I/O, L150N
I/O, L150P
5
AB6
XC2S400E
-
I/O, L150P_Y
I/O, L150P
I/O, L149N_YY
5
AC6
All
-
I/O, L149N_YY
I/O, L149P_YY
5
AD6
All
-
I/O, L149P_YY
I/O, VREF Bank 5,
L148N_YY
5
AE6
All
I/O, VREF Bank 5,
L148N_YY
I/O, VREF Bank 5,
L148N_YY
I/O, L148P_YY
5
AF6
All
-
I/O, L148P_YY
I/O, L147N
5
AA7
XC2S600E
-
I/O, L147N_Y
I/O, L147P
5
AB7
XC2S600E
-
I/O
I/O, L147P_Y
I/O, L146N_YY
5
AC7
All
-
I/O, L146N_YY
I/O, L146P_YY
5
AD7
All
-
I/O, L146P_YY
I/O, L145N_YY
5
AE7
All
-
I/O, L145N_YY
I/O, L145P_YY
5
AF7
All
-
I/O, L145P_YY
I/O, VREF Bank 5,
L144N_YY
5
Y8
All
I/O, VREF Bank 5,
L144N_YY
I/O, VREF Bank 5,
L144N_YY
I/O, L144P_YY
5
AA8
All
-
I/O, L144P_YY
I/O, L143N_YY
5
AE8
All
-
I/O, L143N_YY
I/O, L143P_YY
5
AF8
All
-
I/O, L143P_YY
I/O
5
AB8
-
I/O
I/O, L142N
5
W9
XC2S600E
-
I/O, L142N
I/O, L142N_Y
I/O, L142P
5
Y9
XC2S600E
-
I/O, L142P
I/O, L142P_Y
I/O, L141N
5
AA9
XC2S600E
-
I/O, VREF Bank 5,
L141N_Y
I/O, L141P
5
AB9
XC2S600E
-
I/O
I/O, L141P_Y
I/O, L140N_YY
5
AC9
All
-
I/O, L140N_YY
I/O, L140P_YY
5
AD9
All
-
I/O, L140P_YY
I/O, L139N_YY
5
AE9
All
-
I/O, L139N_YY
I/O, L139P_YY
5
AF9
All
-
I/O, L139P_YY
I/O, VREF Bank 5,
L138N_YY
5
W10
All
I/O, VREF Bank 5,
L138N_YY
I/O, VREF Bank 5,
L138N_YY
FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
Pad Name
Pin
LVDS Async.
Output Option
VREF
Option
Device-Specific Pinouts
Function
Bank
XC2S400E
XC2S600E
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