參數(shù)資料
型號: XC2S100E-6FTG256C
廠商: Xilinx Inc
文件頁數(shù): 82/108頁
文件大?。?/td> 0K
描述: IC SPARTAN-IIE FPGA 100K 256FBGA
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標準包裝: 90
系列: Spartan®-IIE
LAB/CLB數(shù): 600
邏輯元件/單元數(shù): 2700
RAM 位總計: 40960
輸入/輸出數(shù): 182
門數(shù): 100000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-FTBGA
其它名稱: 122-1322
DS077-4 (v3.0) August 9, 2013
75
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
I/O,
L#P_YY
7
L5
All
-
I/O,
L75P_YY
I/O,
L99P_YY
I/O,
L105P_YY
I/O,
L105P_YY
I/O,
L105P_YY
I/O,
L105P_YY
I/O (IRDY),
L#N_YY
7
L6
All
-
I/O (IRDY),
L75N_YY
I/O (IRDY),
L99N_YY
I/O (IRDY),
L105N_YY
I/O (IRDY),
L105N_YY
I/O (IRDY),
L105N_YY
I/O (IRDY),
L105N_YY
I/O (TRDY)
6
M1
-
I/O (TRDY)
I/O
6
M2
-
I/O
I/O, L#P_Y
6
M3
XC2S200E,
300E, 600E
-
I/O
I/O,
L104P_Y
I/O,
L104P_Y
I/O, L104P
I/O,
L104P_Y
I/O, L#N_Y
6
M4
XC2S100E,
150E, 200E,
300E, 600E
XC2S400E,
600E
I/O, L74P_Y I/O, L98P_Y
I/O,
L104N_Y
I/O,
L104N_Y
I/O, VREF
Bank 6,
L104N
I/O, VREF
Bank 6,
L104N_Y
I/O, L#P_Y
6
M5
XC2S100E,
150E, 300E,
400E
-
I/O,
L74N_Y
I/O,
L98N_Y
I/O, L103P
I/O,
L103P_Y
I/O,
L103P_Y
I/O, L103P
I/O, L#N_Y
6
M6
XC2S300E,
400E
-
I/O, L103N
I/O,
L103N_Y
I/O,
L103N_Y
I/O, L103N
I/O
6
N1
-
I/O
6
N2
-
I/O, L73P
I/O, L97P
I/O
I/O, VREF
Bank 6,
L#P
6
N3
XC2S200E,
400E
All
I/O, VREF
Bank 6,
L73N
I/O, VREF
Bank 6,
L97N
I/O, VREF
Bank 6,
L102P_Y
I/O, VREF
Bank 6,
L102P
I/O, VREF
Bank 6,
L102P_Y
I/O, VREF
Bank 6,
L102P
I/O, L#N
6
N4
XC2S100E,
150E, 200E,
400E
-
I/O, L72P_Y I/O, L96P_Y
I/O,
L102N_Y
I/O, L102N
I/O,
L102N_Y
I/O, L102N
I/O, L#P_Y
6
N5
XC2S100E,
150E, 300E,
600E
-
I/O,
L72N_Y
I/O,
L96N_Y
I/O, L101P
I/O,
L101P_Y
I/O, L101P
I/O,
L101P_Y
I/O, L#N_Y
6
N6
XC2S300E,
600E
-
I/O, L101N
I/O,
L101N_Y
I/O, L101N
I/O,
L101N_Y
I/O, L#P_Y
6
P1
XC2S150E,
200E, 300E,
600E
-
I/O, L95P_Y
I/O,
L100P_Y
I/O,
L100P_Y
I/O, L100P
I/O,
L100P_Y
I/O, L#N_Y
6
P2
XC2S100E,
150E, 200E,
300E, 600E
-
I/O, L71P_Y
I/O,
L95N_Y
I/O,
L100N_Y
I/O,
L100N_Y
I/O, L100N
I/O,
L100N_Y
I/O
6
R1
XC2S100E,
150E
-
I/O,
L71N_Y
I/O, L94P_Y
I/O
I/O, L#P_Y
6
P3
XC2S150E,
200E, 300E,
400E, 600E
-
I/O,
L94N_Y
I/O, L99P_Y I/O, L99P_Y I/O, L99P_Y I/O, L99P_Y
I/O, L#N_Y
6
P4
XC2S200E,
300E, 400E,
600E
-
I/O,
L99N_Y
I/O,
L99N_Y
I/O,
L99N_Y
I/O,
L99N_Y
I/O,
L#P_YY
6
P5
All
-
I/O,
L70P_YY
I/O,
L93P_YY
I/O,
L98P_YY
I/O,
L98P_YY
I/O,
L98P_YY
I/O,
L98P_YY
I/O,
L#N_YY
6
P6
All
-
I/O,
L70N_YY
I/O,
L93N_YY
I/O,
L98N_YY
I/O,
L98N_YY
I/O,
L98N_YY
I/O,
L98N_YY
FG456 Pinouts (XC2S100E, XC2S150E, XC2S200E, XC2S300E, XC2S400E, XC2S600E)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Device-Specific Pinouts: XC2S
Function
Bank
100E
150E
200E
300E
400E
600E
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